Industry Articles
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The 'off-the-shelf' IPs for today's SoCs
(Monday, May 24, 2010)
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Protecting FPGAs from power analysis security vulnerabilities
(Thursday, May 20, 2010)
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H.264 High Profile: Codec for Broadcast & Professional Video Application
(Thursday, May 20, 2010)
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Current thoughts on custom IC design
(Tuesday, May 18, 2010)
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Continuous integration of complex reconfigurable systems
(Monday, May 17, 2010)
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Using unified modeling methods to reduce embedded hardware/software development
(Thursday, May 13, 2010)
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A RTCA-DO-254 Compliant Development Process for Supporting the Design of High-Quality Hard IP Cores
(Monday, May 10, 2010)
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Algorithmic delay and synchronization in MPEG audio codecs
(Monday, May 10, 2010)
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Powering Down: Enabling a Power Regression Flow for SoC Design
(Monday, May 10, 2010)
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The Need for Variable Precision DSP Architecture
(Thursday, May 6, 2010)
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A Novel Mesh Architecture for On-Chip Networks
(Thursday, May 6, 2010)
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The documentation challenge
(Monday, May 3, 2010)
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DDGEN: An Automated Device Driver Generation Tool for Embedded Systems
(Monday, May 3, 2010)
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Integrating analog video interface IP into SoCs delivers superb image quality (Part II)
(Monday, May 3, 2010)
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A 0.79-mm2 29-mW Real-Time Face Detection IP Core
(Thursday, April 29, 2010)
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Low-Power Intel Architecture Platform for In-Vehicle Infotainment - Part 1: Overview
(Thursday, April 29, 2010)
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Making source code analysis part of the software development process
(Monday, April 26, 2010)
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Choosing the best Standard Cell Library without falling into the traps of traditional benchmarking methods
(Monday, April 26, 2010)
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Maximizing the value of your IP
(Friday, April 23, 2010)
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Timing Closure on FPGAs
(Thursday, April 22, 2010)
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Clearing the hurdles of HLS adoption
(Monday, April 19, 2010)
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An Analysis of Blocking versus Non-Blocking Flow Control in On-Chip Networks
(Monday, April 19, 2010)
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Developing a test plan to make your design HDMI 1.4 compliant
(Thursday, April 15, 2010)
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The multicore SoC: Will 2010 be the turning point?
(Thursday, April 15, 2010)
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Incorporating Quality into Reusable Interface IP
(Monday, April 12, 2010)
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PP: An Application-Specific Processor for Manycore Architectures
(Monday, April 12, 2010)
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Integrating analog video interface IP into SoCs delivers superb image quality (Part I)
(Wednesday, April 7, 2010)
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DDR3 memory interface controller IP speeds data processing applications
(Tuesday, April 6, 2010)
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Design of an image-processing device for cost-sensitive, high-volume applications using a novel dynamically reconfigurable technology
(Tuesday, April 6, 2010)
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The basics of setting up hardware verification testbenches using OVM configuration classes
(Monday, April 5, 2010)
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RTL synthesis can accelerate the entire implementation flow
(Thursday, April 1, 2010)
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Source Code Analysis in an Agile World
(Monday, March 29, 2010)
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Efficient Verification and Virtual Prototyping of Analog and Mixed-Signal IP and SOCs Using Behavioral Models
(Thursday, March 25, 2010)
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Why hardware designers should switch to Eclipse
(Monday, March 22, 2010)
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A Step By Step Methodical Approach for Efficient Mixed-Language IP Integration
(Monday, March 22, 2010)
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EDA is not enough!
(Monday, March 22, 2010)
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Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 1)
(Thursday, March 18, 2010)
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A Flexible, Field-programmable ROM Replacement
(Monday, March 15, 2010)
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Viewpoint: Your future is programmable
(Thursday, March 11, 2010)
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Initial Investigations into UML Based Architectural Reference Patterns for Set-Top Boxes
(Monday, March 8, 2010)
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Selecting an embedded MCU: How to avoid evaluation trap?
(Monday, March 8, 2010)
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Decompiling the ARM architecture code
(Monday, March 8, 2010)
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Viewpoint: The importance of FPGA-to-ASIC solutions to accelerate CPU-based protocols
(Thursday, March 4, 2010)
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Time to market is a critical consideration
(Monday, March 1, 2010)
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Embedded Symmetric MultiProcessing system on a SoC with 1.6GHz PowerPC IP in 45nm
(Monday, March 1, 2010)
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Evolving to a Total IP Solutions to Accelerate SoC Design
(Monday, March 1, 2010)
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Software Architecture for IP verification in Operating System environment
(Thursday, February 25, 2010)
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High-level synthesis, verification and language
(Monday, February 22, 2010)
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Analog and Mixed Signal Modeling Approaches
(Monday, February 22, 2010)
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Reusable VHDL IP in the Real World
(Thursday, February 18, 2010)
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