Industry Articles
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Building security into an AI SoC using CPU features with extensions
(Monday, April 12, 2021)
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CAVP - NIST ACVTS - Are you still with me?
(Thursday, April 1, 2021)
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Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications - PART 3 : Optimizing latency key factor
(Monday, March 29, 2021)
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Basics of SRAM PUF and how to deploy it for IoT security
(Thursday, March 25, 2021)
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Colibri, the codec for perfect quality and fast distribution of professional AV over IP
(Thursday, March 18, 2021)
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Increasing bandwidth to 128 GB/s with a tailored PCIe 6.0 IP Controller
(Wednesday, March 17, 2021)
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A RISC-V ISA Extension For Ultra-Low Power IoT Wireless Signal Processing
(Monday, March 15, 2021)
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Paving the way for the next generation audio codec for True Wireless Stereo (TWS) applications - PART 2 : Increasing play time
(Monday, March 15, 2021)
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How MIPI Alliance specs enable the IIoT
(Monday, March 8, 2021)
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Standardized PUF-based Solution for Device eID
(Monday, March 8, 2021)
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Licensing Interconnect IP for Fun & Profit
(Thursday, February 25, 2021)
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Specifying a PLL Part 3: Jitter Budgeting for Synthesis
(Monday, February 22, 2021)
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Consider ASICs for implementing functional safety in battery-powered home appliances
(Thursday, February 18, 2021)
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Enabling AI Vision at the Edge
(Wednesday, February 17, 2021)
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Retiming USB4 over USB-C
(Friday, February 12, 2021)
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I-fuse: Most Reliable and Fully Testable OTP
(Monday, February 8, 2021)
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How to specify and integrate successfully a measurement analog front-end including its power computation engine in an energy metering IC
(Monday, February 8, 2021)
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USB 3.2: A USB Type-C Challenge for SoC Designers
(Tuesday, February 2, 2021)
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Multi-Layer Deep Data Performance Monitoring and Optimization
(Tuesday, February 2, 2021)
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It's Time to Look at FD-SOI (Again)
(Tuesday, February 2, 2021)
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PUF is a Hardware Solution for the Sunburst Hack
(Tuesday, January 26, 2021)
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Verifying Dynamic Clock switching in Power-Critical SoCs
(Monday, January 18, 2021)
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Let's make RISC-V connected systems synonymous with security
(Thursday, January 14, 2021)
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Quantum Tunneling Mechanism in NeoFuse
(Thursday, January 14, 2021)
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IO and multiprotocol processing in highly demanding embedded architectures
(Monday, January 11, 2021)
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Smart Wave Dump - A smart way to generate waveforms
(Monday, January 4, 2021)
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The Four Angles of Examining PUF
(Monday, January 4, 2021)
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Congestion & Timing Optimization Techniques at 7nm Design
(Monday, January 4, 2021)
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Lower Process Nodes Drive Timing Signoff Software Evolution
(Tuesday, December 29, 2020)
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Gathering Regression List for Structural Coverage Analysis
(Monday, November 30, 2020)
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The Growing Market for Specialized Artificial Intelligence IP in SoCs
(Thursday, November 26, 2020)
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The Future Of Chip Design
(Tuesday, November 24, 2020)
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8- and 16-bit processors: state of the art
(Monday, November 23, 2020)
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Seize the Ethernet TSN Opportunity
(Monday, November 16, 2020)
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Solving the problem of growing ASIC respins
(Thursday, November 12, 2020)
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A MAC-less Neural Inference Processor Supporting Compressed, Variable Precision Weights
(Thursday, November 12, 2020)
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Optimizing Floorplan for STA and Timing improvement in VLSI Design Flow
(Monday, November 9, 2020)
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Avoid HPC Data Traffic Jams with High-Speed Interface IP
(Wednesday, November 4, 2020)
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ISA optimizations for hardware and software harmony: Custom instructions and RISC-V extensions
(Monday, November 2, 2020)
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Solving a problem like reuse
(Monday, November 2, 2020)
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Next Gen Scan Compression Technique to overcome Test challenges at Lower Technology Nodes (Part - I)
(Monday, October 26, 2020)
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Specifying a PLL Part 2: Jitter Basics
(Thursday, October 22, 2020)
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Why vehicle security may require a different approach
(Tuesday, October 20, 2020)
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VLSI Physical Design Methodology for ASIC Development with a Flavor of IP Hardening
(Monday, October 19, 2020)
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Understanding Efficiency of Switched Capacitor DC-DC Converters for Battery-Powered Applications
(Monday, October 12, 2020)
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Creating Domain Specific Processors Using Custom RISC-V ISA Instructions
(Monday, September 28, 2020)
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Reducing Debug time for Scan pattern using Parallel Strobe Data (PSD) Flow
(Monday, September 21, 2020)
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PUF based Root of Trust PUFrt for High-Security AI Application
(Wednesday, September 16, 2020)
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RISC-V's CPU Verification Challenge
(Tuesday, September 8, 2020)
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The Answer to Non-Volatile Memory Security Issues at Advanced Nodes: Go Volatile!
(Monday, August 31, 2020)
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