Blogs
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TSMC Extends Open Innovation Platform
(Monday, June 7, 2010)
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An inconvenient truth about using DDR3 SDRAM for embedded designs
(Monday, June 7, 2010)
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The Deal Of The Decade
(Monday, June 7, 2010)
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Linaro scratches the chipmakers' software itch
(Monday, June 7, 2010)
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ARM Targets Xeon
(Monday, June 7, 2010)
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Global semicon sales forecast estimates based on Cowan’s LRA model
(Thursday, June 3, 2010)
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ST's ramp-up to 20nm
(Thursday, June 3, 2010)
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A Model for Justifying More EDA Tools
(Thursday, June 3, 2010)
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Is Globalfoundries On The Wrong Tack?
(Thursday, June 3, 2010)
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Top Ten IC Companies In Q1 2010
(Wednesday, June 2, 2010)
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More on the Xilinx EPP: Three ways to communicate with on-chip peripherals
(Wednesday, June 2, 2010)
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Making it Easy with Hard DDR PHY's
(Wednesday, June 2, 2010)
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Making Life Easier for IP Providers and Users
(Tuesday, June 1, 2010)
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Globalfoundries' turn in tit-for-tat expansion plans
(Tuesday, June 1, 2010)
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What you need to know about EDA360
(Tuesday, June 1, 2010)
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TSMC OIP vs CDNS OIP Analysis
(Monday, May 31, 2010)
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Farewell to Wally Rhines at Mentor?
(Friday, May 28, 2010)
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EDA360 Is More Than Design IP Plus Software Drivers
(Friday, May 28, 2010)
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Which Direction for EDA - 2D, 3D, or 360?
(Monday, May 24, 2010)
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450mm Semiconductor Manufacturing Debate
(Monday, May 24, 2010)
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GlobalFoundries enabling the next wave of "foundry" innovation
(Monday, May 24, 2010)
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IP's a slow burner
(Friday, May 21, 2010)
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The Company That Takes ASIC Specs Written On A Napkin
(Wednesday, May 19, 2010)
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Why Are Potato Chip-Makers Smarter Than Silicon Chip-Makers?
(Tuesday, May 18, 2010)
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EDAC forecast panel
(Monday, May 17, 2010)
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EmbeDAC
(Monday, May 17, 2010)
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Is it time to start using high-level synthesis?
(Monday, May 17, 2010)
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Cadence summits Denali
(Monday, May 17, 2010)
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How to design a 40-billion-transistor SoC (and live to tell the tale)
(Monday, May 17, 2010)
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TSMC 28nm moves toward reality, with its retinue
(Monday, May 17, 2010)
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Xilinx revisits the embedded-CPU FPGA
(Monday, May 17, 2010)
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Bringing MEMS and asynchronous logic into an SoC design flow
(Monday, May 17, 2010)
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SoC design in China and the future for 28nm
(Monday, May 17, 2010)
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Cadence and Denali: perhaps more than meets the eye
(Monday, May 17, 2010)
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How far can multicore SoC scaling go? Cavium's Octeon II
(Monday, May 17, 2010)
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Cadence Acquires Denali: The Analysis
(Monday, May 17, 2010)
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2010 Semiconductor Foundry Update: Consolidation!
(Monday, May 17, 2010)
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Do We Need Independent EDA Companies?
(Thursday, May 13, 2010)
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Android Outsells iPhones, Opens Processor Market
(Thursday, May 13, 2010)
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Is there such a thing as analog IP?
(Thursday, May 13, 2010)
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Invent everything yourself!
(Wednesday, May 12, 2010)
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What is Verification IP?
(Wednesday, May 12, 2010)
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ARM's foray into the server market
(Tuesday, May 11, 2010)
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What's happening on the 450mm wafer front?
(Monday, May 10, 2010)
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Cadence tries to avoid the Tality trap
(Monday, May 10, 2010)
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Cadence EDA360 Redux!
(Monday, May 10, 2010)
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The Riddle Of 450mm
(Monday, May 10, 2010)
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Is EDA A Tool Industry Or Service Industry?
(Friday, May 7, 2010)
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Why semiconductor IP works
(Friday, May 7, 2010)
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Gartner's Ten Biggest OEM/ODM IC Consumers In 2009
(Wednesday, May 5, 2010)
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