Design & Reuse
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2786 IP
1551
0.118
UMC 28nm HPM/LVT Logic Process 12-track generic_core library with LPKUS (C38)
UMC 28nm HPM/LVT Logic Process 12-track generic_core library with LPKUS (C38)...
1552
0.118
UMC 28nm HPM/LVT Logic Process 12-track powerslash_core library
UMC 28nm HPM/LVT Logic Process 12-track powerslash_core library...
1553
0.118
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C31)...
1554
0.118
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track ECO_M1 core cell library (C35)...
1555
0.118
UMC 28nm HPM/LVT Logic Process 9-track generic core cell library (C38)
UMC 28nm HPM/LVT Logic Process 9-track generic core cell library (C38)...
1556
0.118
UMC 28nm HPM/LVT Logic Process 9-track PowerSlash cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track PowerSlash cell library (C35)...
1557
0.118
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic Core cell library (C31)
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic Core cell library (C31)...
1558
0.118
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic core cell library (C35)
UMC 28nm HPM/LVT Logic Process 9-track Standard Generic core cell library (C35)...
1559
0.118
UMC 28nm HPM/RVT 9-track generic core cells(35nm)
UMC 28nm HPM/RVT 9-track generic core cells(35nm)...
1560
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library...
1561
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track generic cell library...
1562
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track powerslash_core library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 12-track powerslash_core library...
1563
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track eco_m1 cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track eco_m1 cell library...
1564
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track generic core cell library...
1565
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 RVT)
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with LMINUS (C31 RVT)...
1566
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 RVT)
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Genernic Core cell library with with LPLUS (C38 RVT)...
1567
0.118
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Power Slash cell library
UMC 28nm HPM/RVT Logic and Mixed-Mode Process 7-track Power Slash cell library...
1568
0.118
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)...
1569
0.118
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)
UMC 28nm HPM/RVT Logic Process 12-track generic cell library with LPLUS (C38)...
1570
0.118
UMC 28nm HPM/RVT Logic Process 12-track generic_core library with LMINUS (C31)
UMC 28nm HPM/RVT Logic Process 12-track generic_core library with LMINUS (C31)...
1571
0.118
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)
UMC 28nm HPM/RVT Logic Process 9-track ECO_M1 core cell library (C31)...
1572
0.118
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)
UMC 28nm HPM/RVT Logic Process 9-track Standard ECO_M1 CORE cell library (C38)...
1573
0.118
UMC 28nm HPM/RVT Logic Process 9-track Standard Generic Core cell library (C31)
UMC 28nm HPM/RVT Logic Process 9-track Standard Generic Core cell library (C31)...
1574
0.118
UMC 28nm HPM/RVT Logic Process 9-track Standard generic core cell library (C38)
UMC 28nm HPM/RVT Logic Process 9-track Standard generic core cell library (C38)...
1575
0.118
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)
UMC 28nm HPM/RVT Process 9-track ECO core cells Library(35nm)...
1576
0.118
UMC 28nm HPM/RVT Process 9-track PSK core cells Library(35nm)
UMC 28nm HPM/RVT Process 9-track PSK core cells Library(35nm)...
1577
0.118
UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.05V Analog ESD IO cell Library
UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.05V Analog ESD IO cell Library...
1578
0.118
UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.8V Analog ESD IO cell Library
UMC 28nm Logic and Mixed-Mode HLP/RVT Process, 1.8V Analog ESD IO cell Library...
1579
0.118
UMC 28nm Logic and Mixed-Mode HPC Process 3.3V Analog ESD IO cell Library
UMC 28nm Logic and Mixed-Mode HPC Process 3.3V Analog ESD IO cell Library...
1580
0.118
UMC 28nm Logic and Mixed-Mode HPC Process, 1.8V Analog ESD IO cell Library
UMC 28nm Logic and Mixed-Mode HPC Process, 1.8V Analog ESD IO cell Library...
1581
0.118
UMC 28nm Logic and Mixed-Mode HPC Process,0.9V Analog ESD IO cell Library
UMC 28nm Logic and Mixed-Mode HPC Process,0.9V Analog ESD IO cell Library...
1582
0.118
UMC 28nm Logic and Mixed-Mode HPC Processs Multi-Voltage BOAC SD3.0 I/O Cell library
UMC 28nm Logic and Mixed-Mode HPC Processs Multi-Voltage BOAC SD3.0 I/O Cell library...
1583
0.118
UMC 28nm Logic and Mixed-Mode Low-K HPC Process 1.8V BOAC I/O Cell library
UMC 28nm Logic and Mixed-Mode Low-K HPC Process 1.8V BOAC I/O Cell library...
1584
0.118
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V High Frequency Oscillator BOAC IO Cell Library
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V High Frequency Oscillator BOAC IO Cell Library...
1585
0.118
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V Low Power Low Frequency OSC IO Cell Library
UMC 28nm Logic and Mixed-Mode Low-K HPC Process True 1.8V Low Power Low Frequency OSC IO Cell Library...
1586
0.118
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler....
1587
0.118
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler....
1588
0.118
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy.
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy....
1589
0.118
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler.
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler....
1590
0.118
UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.
UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler....
1591
0.118
UMC 40nm Logic process standard Synchronous High Density Two Port Register File SRAM memory compiler.
UMC 40nm Logic process standard Synchronous High Density Two Port Register File SRAM memory compiler....
1592
0.118
UMC 40nm Low Power Process , Two Port Register File with dual power rail
UMC 40nm Low Power Process , Two Port Register File with dual power rail...
1593
0.118
UMC 40nm Low Power Process Dual-Port SRAM compiler with dual power rail
UMC 40nm Low Power Process Dual-Port SRAM compiler with dual power rail...
1594
0.118
UMC 40nm Low Power Process One Port Register File wit 213 cell
UMC 40nm Low Power Process One Port Register File wit 213 cell...
1595
0.118
UMC 40nm Low Power Process One Port Register File with 213 cell
UMC 40nm Low Power Process One Port Register File with 213 cell...
1596
0.118
UMC 40nm Low Power Process PG SP-SRAM with Row redundancy for 213 bit cell
UMC 40nm Low Power Process PG SP-SRAM with Row redundancy for 213 bit cell...
1597
0.118
UMC 40nm Low Power Process Single-Port SRAM 213cell with power gating
UMC 40nm Low Power Process Single-Port SRAM 213cell with power gating...
1598
0.118
UMC 40nm Low Power Process Single-Port SRAM for dual power rail
UMC 40nm Low Power Process Single-Port SRAM for dual power rail...
1599
0.118
UMC 40nm Low Power Process SP-SRAM memory compiler with row redundancy and 213 bit cell
UMC 40nm Low Power Process SP-SRAM memory compiler with row redundancy and 213 bit cell...
1600
0.118
UMC 40nm Low Power Process SP-SRAM with 213 bit cell
UMC 40nm Low Power Process SP-SRAM with 213 bit cell...