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1651

0.118

UMC 55nm e-flash Logic Process OSC High IO Library

UMC 55nm e-flash Logic Process OSC High IO Library...

1652

0.118

UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler

UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler...

1653

0.118

UMC 55nm eFlash peocess One Port Register File memory compiler_x005F_x005F_x005F_x005F_x005F_x000D_

UMC 55nm eFlash peocess One Port Register File memory compiler...

1654

0.118

UMC 55nm eflash process , Two Port Register File memory compiler

UMC 55nm eflash process , Two Port Register File memory compiler...

1655

0.118

UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler

UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler...

1656

0.118

UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy

UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy...

1657

0.118

UMC 55nm eFlash process process synchronous low power feature RVT peripheral high density single port SRAM compiler.

UMC 55nm eFlash process process synchronous low power feature RVT peripheral high density single port SRAM compiler....

1658

0.118

UMC 55nm eFlash process process ULL ROM Memory Compiler

UMC 55nm eFlash process process ULL ROM Memory Compiler...

1659

0.118

UMC 55nm eFlash process synchronous low power feature RVT peripheral high density single port SRAM compiler with row redundancy.

UMC 55nm eFlash process synchronous low power feature RVT peripheral high density single port SRAM compiler with row redundancy....

1660

0.118

UMC 55nm EFLASH Process Two Port Register File

UMC 55nm EFLASH Process Two Port Register File...

1661

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UMC 55nm EFLASH Process ULL One Port Register File

UMC 55nm EFLASH Process ULL One Port Register File...

1662

0.118

UMC 55nm EFLASH Process Via ROM Memory complier

UMC 55nm EFLASH Process Via ROM Memory complier...

1663

0.118

UMC 55nm EFLASH Processy Single-Port SRAM with row repair Memory complier

UMC 55nm EFLASH Processy Single-Port SRAM with row repair Memory complier...

1664

0.118

UMC 55nm eFlash Single-Port SRAM memory compiler

UMC 55nm eFlash Single-Port SRAM memory compiler...

1665

0.118

UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library

UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library...

1666

0.118

UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library

UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library...

1667

0.118

UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library

UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library...

1668

0.118

UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library

UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library...

1669

0.118

UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library

UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library...

1670

0.118

UMC 55nm eFlash/HVT Logic Process High Speed 12-track PowerSlash Kit cell library

UMC 55nm eFlash/HVT Logic Process High Speed 12-track PowerSlash Kit cell library...

1671

0.118

UMC 55nm eFlash/HVT LowK Logic Process 8-track POWERSLASH Core Library

UMC 55nm eFlash/HVT LowK Logic Process 8-track POWERSLASH Core Library...

1672

0.118

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library...

1673

0.118

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library...

1674

0.118

UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library

UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library...

1675

0.118

UMC 55nm eFlash/LVT Logic Process 7-track Genernic Core cell library

UMC 55nm eFlash/LVT Logic Process 7-track Genernic Core cell library...

1676

0.118

UMC 55nm eFlash/LVT Logic Process 7-track PowerSlash Kit cell library

UMC 55nm eFlash/LVT Logic Process 7-track PowerSlash Kit cell library...

1677

0.118

UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library

UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library...

1678

0.118

UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library

UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library...

1679

0.118

UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library

UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library...

1680

0.118

UMC 55nm eFlash/RVT Logic Process 7-track ECO_M1 cell library

UMC 55nm eFlash/RVT Logic Process 7-track ECO_M1 cell library...

1681

0.118

UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library

UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library...

1682

0.118

UMC 55nm eFlash/RVT Logic Process 7-track PowerSlash Kit cell library

UMC 55nm eFlash/RVT Logic Process 7-track PowerSlash Kit cell library...

1683

0.118

UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library

UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library...

1684

0.118

UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library

UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library...

1685

0.118

UMC 55nm eFlash/RVT Logic Process High Speed 12-track PowerSlash Kit cell library

UMC 55nm eFlash/RVT Logic Process High Speed 12-track PowerSlash Kit cell library...

1686

0.118

UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library

UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library...

1687

0.118

UMC 55nm eFlash/RVT LowK Logic Process 8-track Genernic Core cell Library

UMC 55nm eFlash/RVT LowK Logic Process 8-track Genernic Core cell Library...

1688

0.118

UMC 55nm eFlash/RVT LowK Logic Process 8-track PowerSlash Kit cell Library

UMC 55nm eFlash/RVT LowK Logic Process 8-track PowerSlash Kit cell Library...

1689

0.118

UMC 55nm eflash/ulp process standard synchronous high density single port SRAM memory compiler.

UMC 55nm eflash/ulp process standard synchronous high density single port SRAM memory compiler....

1690

0.118

UMC 55nm eHV process ; Single-Port SRAM compiler with Row redundancy

UMC 55nm eHV process ; Single-Port SRAM compiler with Row redundancy...

1691

0.118

UMC 55nm eHV Process Single Port SRAM Memory Compiler with Peripheral H/LVT using 277 bit-cell

UMC 55nm eHV Process Single Port SRAM Memory Compiler with Peripheral H/LVT using 277 bit-cell...

1692

0.118

UMC 55nm eHV Process Single Port SRAM with row redundancy for 277cell

UMC 55nm eHV Process Single Port SRAM with row redundancy for 277cell...

1693

0.118

UMC 55nm eHV process;Single-Port SRAM compiler

UMC 55nm eHV process;Single-Port SRAM compiler...

1694

0.118

UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate Process Ture 3.3V Generic IO Cell Library

UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate Process Ture 3.3V Generic IO Cell Library...

1695

0.118

UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library

UMC 55nm Embedded Flash and Embedded E2PROM Low Power Low-K Split-Gate Process Ture 3.3V Low Power Low Frequency OSC IO Cell Library...

1696

0.118

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT periphery high density single port SRAM memory compiler with row redundancy.

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT periphery high density single port SR...

1697

0.118

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT periphery high density single port SRAM memory compiler.

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT periphery high density single port SR...

1698

0.118

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT+uHVT periphery high density single port SRAM memory compiler with row redundancy.

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT+uHVT periphery high density single po...

1699

0.118

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT+uHVT periphery high density single port SRAM memory compiler.

UMC 55nm embedded flash and embedded E2PROM ultra low power split-gate process synchronous well bias feature HVT+uHVT periphery high density single po...

1700

0.118

UMC 55nm Embedded Flash and Embedded E2PROM Ultra Low Power Split-Gate Process_x005F_x005F_x005F_x005F_x005F_x000D_

UMC 55nm Embedded Flash and Embedded E2PROM Ultra Low Power Split-Gate Process...

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