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5 IP
1
7.5
LCD Panel Controller IP (Exclusively for Turnkey ASIC design; not for standalone licensing)
This is an LCD Panel Controller IP that can drives multiple LCD panels available in the market. It is configurable to support 1/3-bias, 1/2 bias LCDs....
2
2.0
Sensor Interface Subsystem
The agileSensorIF Subsystem is an efficient and highly integrated sensor interface for SoCs/ASICs. Featuring multiple Analog-to-Digital converters (ag...
3
2.0
Sleep Management Unit (SMU) Subsystem
The agileSMU Subsystem is a low power integrated macro consisting of the essential IP blocks required to securely manage waking up a SoC from sleep mo...
4
2.0
Power Management Unit (PMU) Subsystem
The agilePMU Subsystem is an efficient and highly integrated power management unit for SoCs/ASICs. Featuring a power-on-reset, multiple low drop-out r...
5
2.0
Power Voltage Temperature (PVT) Sensor Subsystem
The monitoring of process, voltage and temperature variations are critical to optimize power and performance for modern SoCs/ASICs, especially for adv...
