Design & Reuse
arrow A/D Converter (ADC) (513)
arrow Amplifier (101)
arrow Analog Comparator (19)
arrow Analog Filter (27)
arrow Analog Front Ends (38)
arrow Analog Multiplexer (3)
arrow Analog Subsystems (3)
arrow Clock Synthesizer (77)
arrow Coder/Decoder (CODEC) (106)
arrow D/A Converter (DAC) (213)
arrow DC-DC Converter (62)
arrow DLL (745)
arrow Graphics & Video Modules (15)
arrow Oscillator (322)
arrow Oversampling Modulator (8)
arrow PLL (1704)
arrow Power Management (838)
arrow RF Modules (84)
arrow Sensor (82)
arrow Switched Cap Filter (1)
arrow Temperature Sensor (133)
arrow Other (500)
745 IP
1
100.0
TSMC CLN7FF 7nm DDR DLL - 250MHz-1250MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2
100.0
TSMC CLN7FFLVT 7nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3
100.0
TSMC CLN7FFLVT 7nm Multi Phase DLL - 1200MHz-6000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
4
30.0
TSMC CLN7FF 7nm Multi Phase DLL - 800MHz-4000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
5
10.0
High Performance Fractional-N RF Frequency Synthesizer PLLs for 5G, WiFi, etc
Perceptia’s DeepSub™ pPLL08F is a family of high performance RF frequency synthesizer PLLs featuring industry leading jitter (sub-300fs), phase noise ...
6
10.0
TSMC CLN28HPC 28nm DDR DLL - 150MHz-750MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
7
10.0
TSMC CLN28HPC 28nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
8
10.0
TSMC CLN28HPC 28nm DDR DLL - 316MHz-1580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
9
10.0
TSMC CLN28HPC 28nm Multi Phase DLL - 175MHz-875MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
10
10.0
TSMC CLN28HPC 28nm Multi Phase DLL - 350MHz-1750MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
11
10.0
TSMC CLN28HPC 28nm Multi Phase DLL - 700MHz-3500MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
12
9.0
High Performance Fractional-N RF Frequency Synthesizer PLL in UMC 40LP
Perceptia’s DeepSub™ pPLL08F is an high performance RF frequency synthesizer PLL featuring industry leading jitter (sub 300fs), phase noise and compac...
13
8.0
Ultra-low jitter, type-I ADDLL with adaptive dither cancellation-3GHz-5GHz
InCirT’s Type-I ADDLL5GGF22 is an all-digital delay-locked loop (ADDLL) featuring an adaptive dithering cancellation technique. This innovation ensure...
14
6.0
High Performance Fractional-N RF Frequency Synthesizer PLL in GlobalFoundries 22FDX for 5G, WiFi, etc
Perceptia’s DeepSub™ pPLL08F is an high performance RF frequency synthesizer PLL featuring industry leading jitter (sub 200fs), phase noise and compac...
15
6.0
High Performance Fractional-N RF Frequency Synthesizer PLL in Samsung 14LPP for 5G, WiFi, etc
Perceptia’s DeepSub™ pPLL08F is an high performance RF frequency synthesizer PLL featuring industry leading jitter (sub 300fs), phase noise and compac...
16
6.0
High Performance Fractional-N RF Frequency Synthesizer PLL in Samsung 8LPP for 5G, WiFi, etc
Perceptia’s DeepSub™ pPLL08F is an high performance RF frequency synthesizer PLL featuring industry leading jitter (sub 300fs), phase noise and compac...
17
6.0
High Performance Fractional-N RF Frequency Synthesizer PLL in TSMC 16 for 5G, WiFi, etc
Perceptia’s DeepSub™ pPLL08F is an high performance RF frequency synthesizer PLL featuring industry leading jitter (sub 200fs), phase noise and compac...
18
5.0
Ethernet Packet Switch 1G
Comcores 1G Ethernet Packet Switch IP core is an advanced switch supporting buffering of large amounts of data in external RAM. The non-blocking Ether...
19
3.0
A radiation-hardened 130nm Wirebond IO library with 3.3V GPIO, LVDS TX & RX, 3.3V I2C open-drain, analog cell and OTP program cell
Key attributes of the 130nm IO library include an extended operational temperature range (-55°C to 200°C), sleep retention, and a built-in power regul...
20
2.0
100~450MHz DDR DLL with 80 Phase Selection, SMIC0.1.3um
The AR531S13 is a low-jitter low power dual channel delay locked loop (DLL) design support for DDR application. It is featured with a wide output freq...
21
1.0
4-GHz Jitter-optimized low-power digital PLL
Perceptia’s DeepSub pPLL03 series PLLs are low-cost low-power low-jitter PLLs, for foundry processes from 28 to 180-nm. They are typically used togeth...
22
1.0
4-GHz Jitter-optimized low-power digital PLL
Perceptia’s DeepSubTM pPLL03 series PLLs are low-cost low-power low-jitter PLLs, for foundry processes from 28 to 180-nm. They are typically used toge...
23
1.0
1.5-GHz Jitter-optimized low-power digital PLL
Perceptia’s DeepSub pPLL03 series PLLs are low-cost low-power low-jitter PLLs, for foundry processes from 28 to 180-nm. They are typically used togeth...
24
1.0
30-200 MHz DLL-based frequency multiplier
055TSMC_DLL_01 is a frequency multiplier that combines low phase jitter of clock signal, small area and low current consumption. Block wakes up in “pa...
25
1.0
Master DLL
The INNOSILICON DLL PHY provides the low power and high-speed applications with robust timing and small silicon area. According to the reference clock...
26
1.0
GF L013HP 130nm DDR DLL - 120MHz-600MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
27
1.0
GF L013HP 130nm DDR DLL - 189MHz-945MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
28
1.0
GF L013HP 130nm DDR DLL - 90MHz-450MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
29
1.0
GF L013LP 130nm DDR DLL - 39MHz-195MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
30
1.0
GF L013LP 130nm DDR DLL - 52MHz-260MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
31
1.0
GF L013LP 130nm DDR DLL - 82MHz-410MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
32
1.0
GF L013LV 130nm DDR DLL - 152MHz-760MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
33
1.0
GF L013LV 130nm DDR DLL - 72MHz-360MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
34
1.0
GF L013LV 130nm DDR DLL - 96MHz-480MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
35
1.0
GF L013N 130nm DDR DLL - 107MHz-535MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
36
1.0
GF L013N 130nm DDR DLL - 51MHz-255MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
37
1.0
GF L018CB 180nm DDR DLL - 42MHz-210MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
38
1.0
GF L018CB 180nm DDR DLL - 56MHz-280MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
39
1.0
GF L018CB 180nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
40
1.0
GF L018IB 180nm DDR DLL - 42MHz-210MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
41
1.0
GF L018IB 180nm DDR DLL - 56MHz-280MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
42
1.0
GF L018IB 180nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
43
1.0
GF L018IC 180nm DDR DLL - 42MHz-210MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
44
1.0
GF L018IC 180nm DDR DLL - 56MHz-280MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
45
1.0
GF L018IC 180nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
46
1.0
GF L65G 65nm DDR DLL - 124MHz-620MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
47
1.0
GF L65G 65nm DDR DLL - 196MHz-980MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
48
1.0
GF L65G 65nm DDR DLL - 93MHz-465MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
49
1.0
GF L65LP 65nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
50
1.0
GF L65LP 65nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...