Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3873 IP
1001
1.0
UMC L130HS 130nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1002
1.0
UMC L130LL 130nm DDR DLL - 24MHz-120MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1003
1.0
UMC L130LL 130nm DDR DLL - 32MHz-160MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1004
1.0
UMC L130SP 130nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1005
1.0
UMC L130SP 130nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1006
1.0
UMC L150HS 150nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1007
1.0
UMC L150HS 150nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1008
1.0
UMC L180G 180nm DDR DLL - 42MHz-210MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1009
1.0
UMC L180G 180nm DDR DLL - 56MHz-280MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1010
1.0
UMC L55SP 55nm DDR DLL - 150MHz-750MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1011
1.0
UMC L55SP 55nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1012
1.0
UMC L55SP 55nm DDR DLL - 316MHz-1580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1013
1.0
UMC L65LL 65nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1014
1.0
UMC L65LL 65nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1015
1.0
UMC L65LL 65nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1016
1.0
UMC L65SP 65nm DDR DLL - 150MHz-750MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1017
1.0
UMC L65SP 65nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1018
1.0
UMC L65SP 65nm DDR DLL - 316MHz-1580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1019
1.0
UMC L80G 80nm DDR DLL - 129MHz-645MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1020
1.0
UMC L80G 80nm DDR DLL - 172MHz-860MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1021
1.0
UMC L80GOD 80nm DDR DLL - 150MHz-750MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1022
1.0
UMC L80GOD 80nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1023
1.0
UMC L90G 90nm DDR DLL - 108MHz-540MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1024
1.0
UMC L90G 90nm DDR DLL - 144MHz-720MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1025
1.0
UMC L90GOD 90nm DDR DLL - 144MHz-720MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1026
1.0
UMC L90GOD 90nm DDR DLL - 192MHz-960MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1027
1.0
UMC L90SP 90nm DDR DLL - 60MHz-300MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1028
1.0
UMC L90SP 90nm DDR DLL - 80MHz-400MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1029
1.0
1MHz Oscillator
The ll_osc1455s01_ln14lpp_34201 is a 0.8V oscillator whose output frequency (FOUT) is controlled by internal registers. The typical output frequency o...
1030
1.0
4MHz Oscillator
The ll_osc2700a01_lnf28lp_7002 is a 1.0V oscillator whose output frequency (FOUT) is controlled by internal registers. The typical output frequency ra...
1031
1.0
2MHz Ultra Low Power Oscillator - Ultra low power (720nW) Silterra 0.18 μm
This macro-cell is a general purpose, ultra low power internal oscillator core designed for SilTerra 0.18µm CL180G CMOS technology. The circuit has in...
1032
1.0
6MHz ±1% PVT 1.8V Low Power Oscillator in Silterra 0.18um
This macro-cell is a low-power, precision, general purpose 1.8V 6MHz ±1% PVT internal oscillator core aimed for clock generation. A 7 bit digital bus ...
1033
1.0
6MHz ±1% PVT 3.3V Low Power Oscillator in Silterra 0.18um
This macro-cell is a low-power, precision, general purpose 3.3V 6MHz ±1% PVT internal oscillator core aimed for clock generation. A 7 bit digital bus ...
1034
1.0
SMIC 0.11um 32KHz Crystal Oscillator
Process: SMIC 0.11um Logic 1P8M 1.2V/3.3V CMOS process Operating voltage range: VCC_XO: 1.62~3.6V Operating temperature range: -40~125°C Operati...
1035
1.0
SMIC 0.13um 1.2v 200MHz Ring Oscillator
The SMIC18_CODEC_01 specifies the design of a high-performance 16-bit stereo Audio CODEC for portable digital audio systems. The ADCs and DACs within ...
1036
1.0
SMIC 0.13um 1.2V Power On Reset
Present Power on Reset generates system reset pulses (POR12) when 1.2V power supplier (VIN12) is turned on. This IP can not operate stand-alone becaus...
1037
1.0
SMIC 0.13um 1.2V Power On Reset
Present Power on Reset generates system reset signal (POR12) when 1.2V power supplier (VIN12) is turned on. This IP can not operate stand-alone becaus...
1038
1.0
SMIC 0.13um 1.8V Power On Reset
Present Power on Reset generates system reset pulses (POR18) when 1.8V power supplier (VIN18) is turned on. This IP can not operate stand-alone becaus...
1039
1.0
SMIC 0.13um 1.8V Power On Reset
Present Power on Reset generates system reset signal (POR18) when 1.8V power supplier (VIN18) is turned on. This IP can not operate stand-alone becaus...
1040
1.0
SMIC 0.13um 10Bit 2Channel 24MHz
The VeriSilicon S13V33_ADC_06 IP includes an embedded 10bit 48MHz ADC IP(ADC_03). It is capable of sampling up to 2 channel analog input signals simu...
1041
1.0
SMIC 0.13um 12Bit 500Ksps R2R DAC
S13V33_R2RDAC_04 is a 12Bit 500Ksps DAC IP. It is suitable for voice application....
1042
1.0
SMIC 0.13um 1Channel 10Bit 10MHz DAC
S13V33_R2RDAC_01 is a 10bit@10MHz DAC IP which implements a 7-bit (from D [0] to D [6]) R2R_Ladder and 3-bit thermometer decoder architecture. At the ...
1043
1.0
SMIC 0.13um 2.4V Power on Reset
The present Power on Reset IP generates system reset signal (POR18, low level reset) when 3.3v power supplier (VIN18) is turned on. This IP cannot ope...
1044
1.0
SMIC 0.13um 24-Bit Stereo Sigma-Delta ADC
The S13V33_ADC_01B specifies the design of high-performance 24-bit stereo Audio ADC for portable digital audio systems. The ADC within the specificati...
1045
1.0
SMIC 0.13um 24Bit Sigma-Delta
The S13V33_DAC_01D specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems. The DAC of this design uses ...
1046
1.0
SMIC 0.13um 24M Crystal Oscillator
This is a crystal oscillator specifically designed for low power application. It is configurable to suit for 2M~32MHz crystals working at fundamental ...
1047
1.0
SMIC 0.13um 3.3V 10Bit Single
The VeriSilicon S13V33_ADC_03 IP is a 10 bit, low power, and pipeline analog to digital converter capable of running at up to 50MHz conversion rate. ...
1048
1.0
SMIC 0.13um 3.3V Power On Reset
Present Power on Reset generates system reset pulses (POR33) when the 3.3V power supplier (VIN33) is turned on. This IP can not operate stand-alone be...
1049
1.0
SMIC 0.13um 3.3V Power On Reset
Present Power on Reset generates system reset signal (POR33) when 3.3V power supplier (VIN33) is turned on. This IP can not operate stand-alone becaus...
1050
1.0
SMIC 0.13um 3.3v RC Oscillator
The present IP is a RC oscillator with internal R and C to generate 32±20%KHz clock. Its power supply is 3.3V....