Analog & Mixed Signal IP Core

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1702

1.0

UMC L80GOD 80nm Clock Generator PLL - 150MHz-750MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1703

1.0

UMC L80GOD 80nm Clock Generator PLL - 300MHz-1500MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1704

1.0

UMC L80GOD 80nm Clock Generator PLL - 600MHz-3000MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1705

1.0

UMC L80GOD 80nm DDR DLL - 150MHz-750MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1706

1.0

UMC L80GOD 80nm DDR DLL - 200MHz-1000MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1707

1.0

UMC L80GOD 80nm Deskew PLL - 150MHz-750MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1708

1.0

UMC L80GOD 80nm Deskew PLL - 300MHz-1500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1709

1.0

UMC L80GOD 80nm Deskew PLL - 600MHz-3000MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1710

1.0

UMC L80GOD 80nm Spread Spectrum PLL - 150MHz-750MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1711

1.0

UMC L80GOD 80nm Spread Spectrum PLL - 300MHz-1500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1712

1.0

UMC L80GOD 80nm Spread Spectrum PLL - 600MHz-3000MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1713

1.0

UMC L90G 90nm Clock Generator PLL - 180MHz-900MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1714

1.0

UMC L90G 90nm Clock Generator PLL - 360MHz-1800MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1715

1.0

UMC L90G 90nm Clock Generator PLL - 90MHz-450MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1716

1.0

UMC L90G 90nm DDR DLL - 108MHz-540MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1717

1.0

UMC L90G 90nm DDR DLL - 144MHz-720MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1718

1.0

UMC L90G 90nm Deskew PLL - 180MHz-900MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1719

1.0

UMC L90G 90nm Deskew PLL - 360MHz-1800MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1720

1.0

UMC L90G 90nm Deskew PLL - 90MHz-450MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1721

1.0

UMC L90G 90nm Spread Spectrum PLL - 180MHz-900MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1722

1.0

UMC L90G 90nm Spread Spectrum PLL - 360MHz-1800MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1723

1.0

UMC L90G 90nm Spread Spectrum PLL - 90MHz-450MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1724

1.0

UMC L90GOD 90nm Clock Generator PLL - 125MHz-625MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1725

1.0

UMC L90GOD 90nm Clock Generator PLL - 250MHz-1250MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1726

1.0

UMC L90GOD 90nm Clock Generator PLL - 500MHz-2500MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1727

1.0

UMC L90GOD 90nm DDR DLL - 144MHz-720MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1728

1.0

UMC L90GOD 90nm DDR DLL - 192MHz-960MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1729

1.0

UMC L90GOD 90nm Deskew PLL - 125MHz-625MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1730

1.0

UMC L90GOD 90nm Deskew PLL - 250MHz-1250MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1731

1.0

UMC L90GOD 90nm Deskew PLL - 500MHz-2500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1732

1.0

UMC L90GOD 90nm Spread Spectrum PLL - 125MHz-625MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1733

1.0

UMC L90GOD 90nm Spread Spectrum PLL - 250MHz-1250MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1734

1.0

UMC L90GOD 90nm Spread Spectrum PLL - 500MHz-2500MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1735

1.0

UMC L90SP 90nm Clock Generator PLL - 120MHz-600MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1736

1.0

UMC L90SP 90nm Clock Generator PLL - 240MHz-1200MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1737

1.0

UMC L90SP 90nm Clock Generator PLL - 60MHz-300MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1738

1.0

UMC L90SP 90nm DDR DLL - 60MHz-300MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1739

1.0

UMC L90SP 90nm DDR DLL - 80MHz-400MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1740

1.0

UMC L90SP 90nm Deskew PLL - 120MHz-600MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1741

1.0

UMC L90SP 90nm Deskew PLL - 240MHz-1200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1742

1.0

UMC L90SP 90nm Deskew PLL - 60MHz-300MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1743

1.0

UMC L90SP 90nm Spread Spectrum PLL - 120MHz-600MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1744

1.0

UMC L90SP 90nm Spread Spectrum PLL - 240MHz-1200MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1745

1.0

UMC L90SP 90nm Spread Spectrum PLL - 60MHz-300MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1746

1.0

1MHz Oscillator

The ll_osc1455s01_ln14lpp_34201 is a 0.8V oscillator whose output frequency (FOUT) is controlled by internal registers. The typical output frequency o...

1747

1.0

4MHz Oscillator

The ll_osc2700a01_lnf28lp_7002 is a 1.0V oscillator whose output frequency (FOUT) is controlled by internal registers. The typical output frequency ra...

1748

1.0

2MHz Ultra Low Power Oscillator - Ultra low power (720nW) Silterra 0.18 μm

This macro-cell is a general purpose, ultra low power internal oscillator core designed for SilTerra 0.18µm CL180G CMOS technology. The circuit has in...

1749

1.0

6MHz ±1% PVT 1.8V Low Power Oscillator in Silterra 0.18um

This macro-cell is a low-power, precision, general purpose 1.8V 6MHz ±1% PVT internal oscillator core aimed for clock generation. A 7 bit digital bus ...

1750

1.0

6MHz ±1% PVT 3.3V Low Power Oscillator in Silterra 0.18um

This macro-cell is a low-power, precision, general purpose 3.3V 6MHz ±1% PVT internal oscillator core aimed for clock generation. A 7 bit digital bus ...

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