Design & Reuse
5686 IP
1751
1.0
GLOBALFOUNDRIES 28nm SLP 2.5v/1.0v PLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 800MHz to 3200MHz.By setting DM [5:0] a...
1752
1.0
GLOBALFOUNDRIES 40nm Low Power 1.1v/2.5v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 300MHz to 900MHz. By setting DM[3:0], D...
1753
1.0
GLOBALFOUNDRIES 40nm LP 2.5V/1.1V Power on Reset
The present Power-On-Reset circuit generates system reset pulses (RST) when both the 2.5V and 1.1V power suppliers are turned on. Output signal RST11 ...
1754
1.0
GLOBALFOUNDRIES 40nm LP 3.3V-2.5/1.1V Power Regulator
This IP is a Low-Dropout (LDO) 3.3V to 2.5V and/or 1.1V power regulator in GLOBALFOUNDRIES 40nm LP 1.1V/2.5V process. When it works in regulation regi...
1755
1.0
GLOBALFOUNDRIES 40nm LP 3.3V-2.5/1.1V Power Regulator
This IP is a Low-Dropout (LDO) 3.3V to 2.5V and/or 1.1V power regulator in GLOBALFOUNDRIES 40nm LP 1.1V/2.5V process. When it works in regulation regi...
1756
1.0
GLOBALFOUNDRIES 55nm 1.2V 10Bit IQ 20/40/80MHz ADC
The VeriSilicon GF55LPEV25_ADC_10 IP is a 1.2V 10Bit pipeline analog to digital converter capable of running at up to 80MHz conversion rate with I and...
1757
1.0
GLOBALFOUNDRIES 65nm 2.5/1.0V 32768Hz Crystal Oscillator
This is a 32768Hz crystal oscillator specifically designed for ultra-low power application. The sole power supply is 3.3V, but it can be as low as 1.6...
1758
1.0
GLONASS/GPS/Galileo/BeiDou multisystem single-band 2-channel receiver RFIC
NT1021 is a single-chip dual-channel RF front-end consuming a very low power (47 mW typical at 2.1 V) and performing a simultaneous reception of both ...
1759
1.0
Ultra-low power 12bit 1Msps SARADC
...
1760
1.0
Ultra-low power and high performance 12bit 1Msps SARADC
Supports 1Ksps~2Msps sampling rate; 8-channel differential inputs or 20-channel single-ended inputs; High performance: ENOB≥11.0bit @1Msps; Ultra-low ...
1761
1.0
Ultra-low power and high performance 12bit 1Msps SARADC
...
1762
1.0
Ultra-low power and high performance 12bit SARADC (2.7V~3.6V)
Supports 1Ksps~4Msps sampling rate; 4-channel differential inputs or 8-channel single-ended inputs; High performance: ENOB≥11.0bit @1Msps; Ultra-low p...
1763
1.0
Ultra-low power and low jitter PLL
...
1764
1.0
Bluetooth Low Energy (BLE) RF IP
The VeriSilicon Bluetooth Low Energy (BLE) RF IP is a 2.4GHz ISM band transceiver which is designed for Bluetooth Smart or IEEE 802.15.4 based applica...
1765
1.0
Bluetooth Low Energy (BLE) RF IP
Bluetooth Low Energy (BLE) RF IP provides a transceiver designed for Bluetooth Smart applications. It is compliant with the BLE specification (part of...
1766
1.0
SLVS Interface Driver, Fmax 600MHz - XFAB 180nm
SLVS Interface Driver, Fmax 600MHz - XFAB 180nm...
1767
1.0
Always-on Digital Voice Activity Detection
WhisperTrigger allows your system to detect voice activity and increase its battery life. Our robust and silicon-proven, Voice Activity Detection solu...
1768
1.0
Always-on Voice Activity Detection interfacing with analog microphones
The WT-a-HD.01 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low power applications....
1769
1.0
Always-on Voice Activity Detection interfacing with analog microphones
The WT-a-HD.01 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low power applications....
1770
1.0
Always-on Voice Activity Detection interfacing with analog microphones
The WT-a-HD.03 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low power applications....
1771
1.0
Always-on Voice Activity Detection interfacing with analog microphones
The WT-a-HD.03 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low power applications....
1772
1.0
Always-on Voice Activity Detection interfacing with analog microphones
The WT-a-HD.03 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low power applications....
1773
1.0
Always-on Voice Activity Detection interfacing with analog microphones.
The WT-a-HD.03 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low power applications....
1774
1.0
Always-on Voice Activity Detection interfacing with analog microphones.
The WT-a-HD.03 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra-low power applications....
1775
1.0
UMC 0.18um 1.8v 60MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by the external 1.2v bandgap reference. Its output frequency is about 60MHz and it can be fair...
1776
1.0
UMC 0.18um 1.8v 80MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by the external 1.2v bandgap reference. Its output clocks can be about 80MHz, 60Mhz, 40MHz or ...
1777
1.0
UMC 0.18um 3.3v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run at about 100MHz. By setting different values...
1778
1.0
UMC 0.18um 3.3v-1.8v 150mA Power Regulator
Power Regulator, also called Voltage Regulator, is an on-chip device which provides suitable power supply for the core by regulating the external high...
1779
1.0
UMC 0.18um 5v-3.3v Power Regulator
Based on UMC 0.18um 3.3v/1.8v Logic Process, current design of a Power Regulator is to provide a 3.3v voltage output regulated from a 5v input supply ...
1780
1.0
UMC 0.18um 5v-3.3v Power Regulator
Based on UMC 0.18um 3.3v/1.8v Logic Process, current design of Power Regulator is to provide the 3.3v voltage output regulated from a 5v input supply....
1781
1.0
UMC 0.18um VCC Detector
The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of its power supply, AV28. The normal operating voltage range of AV28 is ...
1782
1.0
UMC 0.18um VCC Detector
The present IP is a VCC Detector (VDT) circuit. It detects the voltage level of input voltage AV33. The normal operation voltage range of AV33 is 3.0v...
1783
1.0
UMC L130HS 130nm Clock Generator PLL - 160MHz-800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1784
1.0
UMC L130HS 130nm Clock Generator PLL - 320MHz-1600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1785
1.0
UMC L130HS 130nm Clock Generator PLL - 80MHz-400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1786
1.0
UMC L130HS 130nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1787
1.0
UMC L130HS 130nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1788
1.0
UMC L130HS 130nm Deskew PLL - 160MHz-800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1789
1.0
UMC L130HS 130nm Deskew PLL - 320MHz-1600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1790
1.0
UMC L130HS 130nm Deskew PLL - 80MHz-400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1791
1.0
UMC L130HS 130nm Spread Spectrum PLL - 160MHz-800MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1792
1.0
UMC L130HS 130nm Spread Spectrum PLL - 320MHz-1600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1793
1.0
UMC L130HS 130nm Spread Spectrum PLL - 80MHz-400MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
1794
1.0
UMC L130LL 130nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1795
1.0
UMC L130LL 130nm Clock Generator PLL - 30MHz-150MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1796
1.0
UMC L130LL 130nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
1797
1.0
UMC L130LL 130nm DDR DLL - 24MHz-120MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1798
1.0
UMC L130LL 130nm DDR DLL - 32MHz-160MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
1799
1.0
UMC L130LL 130nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
1800
1.0
UMC L130LL 130nm Deskew PLL - 30MHz-150MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...