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5588 IP
2401
1.0
TSMC CL015LV 150nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2402
1.0
TSMC CL015LV 150nm Deskew PLL - 140MHz-700MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2403
1.0
TSMC CL015LV 150nm Deskew PLL - 280MHz-1400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2404
1.0
TSMC CL015LV 150nm Deskew PLL - 70MHz-350MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2405
1.0
TSMC CL015LV 150nm Spread Spectrum PLL - 140MHz-700MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2406
1.0
TSMC CL015LV 150nm Spread Spectrum PLL - 280MHz-1400MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2407
1.0
TSMC CL015LV 150nm Spread Spectrum PLL - 70MHz-350MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2408
1.0
TSMC CL018E 180nm Clock Generator PLL - 130MHz-650MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2409
1.0
TSMC CL018E 180nm Clock Generator PLL - 260MHz-1300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2410
1.0
TSMC CL018E 180nm Clock Generator PLL - 65MHz-325MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2411
1.0
TSMC CL018E 180nm DDR DLL - 120MHz-600MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2412
1.0
TSMC CL018E 180nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2413
1.0
TSMC CL018E 180nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2414
1.0
TSMC CL018E 180nm Deskew PLL - 130MHz-650MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2415
1.0
TSMC CL018E 180nm Deskew PLL - 260MHz-1300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2416
1.0
TSMC CL018E 180nm Deskew PLL - 65MHz-325MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2417
1.0
TSMC CL018E 180nm Spread Spectrum PLL - 130MHz-650MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2418
1.0
TSMC CL018E 180nm Spread Spectrum PLL - 260MHz-1300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2419
1.0
TSMC CL018E 180nm Spread Spectrum PLL - 65MHz-325MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2420
1.0
TSMC CL018G 180nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2421
1.0
TSMC CL018G 180nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2422
1.0
TSMC CL018G 180nm Clock Generator PLL - 55MHz-275MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2423
1.0
TSMC CL018G 180nm DDR DLL - 42MHz-210MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2424
1.0
TSMC CL018G 180nm DDR DLL - 56MHz-280MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2425
1.0
TSMC CL018G 180nm DDR DLL - 88MHz-440MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2426
1.0
TSMC CL018G 180nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2427
1.0
TSMC CL018G 180nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2428
1.0
TSMC CL018G 180nm Deskew PLL - 55MHz-275MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2429
1.0
TSMC CL018G 180nm Spread Spectrum PLL - 110MHz-550MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2430
1.0
TSMC CL018G 180nm Spread Spectrum PLL - 220MHz-1100MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2431
1.0
TSMC CL018G 180nm Spread Spectrum PLL - 55MHz-275MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2432
1.0
TSMC CL018LP 180nm Clock Generator PLL - 180MHz-900MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2433
1.0
TSMC CL018LP 180nm Clock Generator PLL - 45MHz-225MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2434
1.0
TSMC CL018LP 180nm Clock Generator PLL - 90MHz-450MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2435
1.0
TSMC CL018LP 180nm DDR DLL - 30MHz-150MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2436
1.0
TSMC CL018LP 180nm DDR DLL - 40MHz-200MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2437
1.0
TSMC CL018LP 180nm DDR DLL - 63MHz-315MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2438
1.0
TSMC CL018LP 180nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2439
1.0
TSMC CL018LP 180nm Deskew PLL - 45MHz-225MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2440
1.0
TSMC CL018LP 180nm Deskew PLL - 90MHz-450MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2441
1.0
TSMC CL018LP 180nm Spread Spectrum PLL - 180MHz-900MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2442
1.0
TSMC CL018LP 180nm Spread Spectrum PLL - 45MHz-225MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2443
1.0
TSMC CL018LP 180nm Spread Spectrum PLL - 90MHz-450MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2444
1.0
TSMC CL018LV 180nm Clock Generator PLL - 118MHz-590MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2445
1.0
TSMC CL018LV 180nm Clock Generator PLL - 236MHz-1180MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2446
1.0
TSMC CL018LV 180nm Clock Generator PLL - 59MHz-295MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2447
1.0
TSMC CL018LV 180nm DDR DLL - 101MHz-505MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2448
1.0
TSMC CL018LV 180nm DDR DLL - 48MHz-240MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2449
1.0
TSMC CL018LV 180nm DDR DLL - 64MHz-320MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2450
1.0
TSMC CL018LV 180nm Deskew PLL - 118MHz-590MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
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