Design & Reuse
5497 IP
2901
0.118
Linear Regulator IP, Output: 3.3V/150mA, UMC 0.11um HS/FSG process
Input 4.5V-5.5V, 3.3V/150mA Output Regulator, UMC 0.11um HS/FSG Logic process....
2902
0.118
Linear Regulator IP, Output: 3.3V/150mA, UMC 0.25um process
3.3V with 150mA driving capability, Istb=75uA Linear Regulator, 0.25um Logic process....
2903
0.118
Linear Regulator IP, Output: 3.3V/200mA, UMC 0.13um HS/FSG process
5V to 3.3V(200mA) & 1.2V(110mA) audio solution regulator, UMC 0.13um HS/FSG Logic process....
2904
0.118
Linear Regulator IP, Output: 3.3V/240mA, UMC 0.18um LL process
3.3V with 240mA driving capability, Istb=uA Linear Regulator, UMC 0.18um LL Logic process....
2905
0.118
Linear Regulator IP, Output: 3.3V/250mA, UMC 0.25um process
3.3V with 250mA driving capability, Istb=85uA Linear Regulator, UMC 0.25um Logic process....
2906
0.118
Linear Regulator IP, Output: 3.3V/300mA, UMC 0.11um HS/AE process
5V to 3.3V with 300mA driving capability, Cascode Structure Regulator, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....
2907
0.118
Linear Regulator IP, Output: 3.3V/350mA, UMC 0.11um HS/AE process
Input 4.5V-5.5V, 3.3V/350mA and 1.2V/100mA Voltage Regulator, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....
2908
0.118
Linear Regulator IP, Output: 3.3V/350mA, UMC 0.11um HS/FSG process
Input 4.5V-5.5V, 3.3V/350mA and 1.2V/350mA Voltage Regulator, UMC 0.11um HS/FSG Logic process....
2909
0.118
Linear Regulator IP, Output: 3.3V/50mA, UMC 0.13um HS/FSG process
3.3V with 50mA driving capability, Istb=70uA Linear Regulator, UMC 0.13um HS/FSG Logic process....
2910
0.118
Linear Regulator IP, Output: 3.3V/70mA, UMC 0.25um process
3.3V with 70mA driving capability, Istb=75uA Linear Regulator, 0.25um Logic process....
2911
0.118
Linear Regulator IP, Output: 4.2V/1000mA, UMC 0.153um MS process
5.0V to 4.2V Linear Regulator with 1000mA driving capability, UMC 0.153um 1.8V/3.3V Logic/Mixed-Mode process....
2912
0.118
Linear Regulator IP, Output: 5V/150mA, UMC 0.35um process
5V with 150mA driving capability, Istb=120uA Linear Regulator, 0.35um Logic process....
2913
0.118
Linear Regulator IP, Output: 5V/50mA, UMC 0.35um process
5V with 50mA driving capability, Istb=124uA Linear Regulator, UMC 0.35um Logic process....
2914
0.118
Linear Regulator IP, Output: 5V/70mA, UMC 0.35um Logic process
5V with 70mA driving capability, Istb=120uA Linear Regulator, 0.35um Logic process....
2915
0.118
Linear Regulator IP, UMC 0.11um HS/AE process
3.3V to 1.2V Capacitor-Free Linear Regulator with 100mA driving capability, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...
2916
0.118
Linear Regulator IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process 3.3V to 1.2V with 100mA driving capability, Linear Regulator with Capacitor-Free....
2917
0.118
Linear Regulator IP, UMC 0.13um HS/FSG process
USB 2.0 Two Port PHY, UMC 0.13um HS/FSG Logic process....
2918
0.118
Linear Regulator IP, UMC 0.18um G2 process
Input 2.7V~3.6V, Output=1.8V,Loading 50mA Regulator, UMC 0.18um GII 1.8V/3.3V Process...
2919
0.118
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.8V with 150mA driving capability, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process....
2920
0.118
Linear Regulator IP, UMC 40nm LP process
1.8V and 1.2V input, loading 360mA, 1.1V output with VBG=0.88V Regulator with BYPASS mode, UMC 40nm LP/RVT Low-K Logic process....
2921
0.118
Linear Regulator IP, UMC 40nm LP process
3.3V to 1.1V/100mA REG, Linear Regulator, UMC 40nm LP/RVT Low-K Logic process....
2922
0.118
Linear Regulator IP, UMC 90nm SP process
2.5V to 1.2V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process....
2923
0.118
Linear Regulator IP, UMC 90nm SP process
3.3V to 1.0V/100mA REG, Linear Regulator, UMC 90nm SP/RVT Low-K Logic process....
2924
0.118
Ring Oscillator IP, Output: 12KHz, UMC 0.13um HS/FSG process
Self-contained ring oscillator, frequency 12KHz. VCC12A=1.08V~1.32V, UMC 0.13um Logic HS process....
2925
0.118
Ring Oscillator IP, Output: 12KHz, UMC 90nm Logic process
12KHz Ring OSC....
2926
0.118
Ring Oscillator IP, Output: 32KHz, UMC 0.11um eFlash/LL process
Self-contained ring oscillator, frequency 32KHz. VCC12A=1.08V~1.32V, UMC 0.11um eFlash Logic process....
2927
0.118
Ring Oscillator IP, Output: 32KHz, UMC 55nm LP process
Internal-RC and Built-in Bandgap, trimmable fixed frequency 80MHz with trimming pad. Input 1.08V-1.32V, UMC 55nm Logic LP/RVT Low-K process...
2928
0.118
Ring Oscillator IP, Output: 8KHz, UMC 0.11um HS/AE process
Self-contained ring oscillator, frequency 8KHz. VCC12A=1.08V~1.32V, UMC 0.11um HS/AE Logic process....
2929
0.118
Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency 156.25M for Jitter-Clean Mode. UMC 28nm HPC Process.
Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency 156.25M for Jitter-Clean Mode. UMC 28nm HPC Process....
2930
0.118
DLL (All Digital) IP, Input: 200MHz - 533MHz, Output: 200MHz - 533MHz, UMC 65nm LP process
Input 200M-533MHz, output 200M-533MHz, all digital DLL with two-channel DQS delay range, UMC 65nm LP/RVT Low-K Logic process....
2931
0.118
DLL (All Digital) IP, Input: 300MHz - 600MHz, Input: 300MHz - 600MHz, UMC 40nm LP process
An ADDLL operate at 300MHz~600MHz.Output 0-180 degree Phase adjustment range.Delay adjustment resolution <= 1% of reference clockUMC 40nm LP/RVT Logic...
2932
0.118
DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz (Programmable output delay stepping with 1/64 clock period), UMC 55nm SP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with per 1/64UI programmable delay, UMC 55nm SP/RVT Low-K Logic process....
2933
0.118
DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 40nm LP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 40nm LP/RVT Low-K Logic process....
2934
0.118
DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 55nm LP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 55nm LP/RVT Low-K Logic process....
2935
0.118
DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 55nm SP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 55nm SP/RVT Low-K Logic process....
2936
0.118
DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 65nm LP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 65nm LP/RVT Low-K Logic process....
2937
0.118
DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 65nm SP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 65nm SP/RVT Low-K Logic process....
2938
0.118
DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 90nm SP process
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 90nm SP/RVT Low-K Logic process....
2939
0.118
DLL (All Digital) IP, Input: 360MHz - 720MHz, Output: 360MHz - 720MHz, UMC 40nm LP process
Input 360M-720MHz, output 360M-720MHz, DLL, Output 0-180 degree Phase adjustment range. UMC 40nm LP process....
2940
0.118
DLL (All Digital) IP, Input: 5MHz - 70MHz, Output: 5MHz - 70MHz, UMC 40nm LP process
An ADDLL operate at 5MHz~70MHz.Output produce a rising/falling edge delay tuning clock.UMC 40nm LP/RVT Logic process....
2941
0.118
PLL (All Digital, Spread Spectrum) IP, Input: 25MHz, Output: 5GHz, UMC 0.11um HS/AE process
5GHz SSCG with 25MHz reference clock, UMC 0.11um HS/AE (AL Advanced Enhancement) 2T Logic process....
2942
0.118
PLL (All Digital, Spread Spectrum) IP, Input: 25MHz, Output: 5GHz, UMC 0.11um HS/AE process
5GHz SSCG with 25MHz reference clock, UMC 0.11um HS/AE (AL Advanced Enhancement) 2T Logic process....
2943
0.118
PLL (All Digital, Spread Spectrum) IP, Input: clock range:10MHz - 1280MHz, Output: 15.625MHz - 2GHz, Spreading depth: -10%(max), Spreading Freq: 20KHz to 300KHz, UMC 0.11um HS/AE process
Input clock range:10M ~ 1280MHz, output clock range:15.625M ~ 2000MHz wide-range SSCG, UMC 0.11um HS/AE (AL Advanced Enhancement) 2T Logic process....
2944
0.118
PLL (De-Skew) IP, Input: 15MHz - 110MHz, Output: 15MHz - 110MHz, UMC 0.13um HS/FSG process
Input 15M-110MHz, output 15M-110MHz, De-skew PLL with 0.9V~1.32V power supply range, UMC 0.13um HS/FSG Logic process....
2945
0.118
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 20MHz - 300MHz, HJTC 0.18um eFlash/G2 process
Input 10M-200MHz, output 20M-300MHz, frequency synthesizable PLL, HJTC 0.18 eFlash process....
2946
0.118
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 20MHz - 300MHz, UMC 0.18um G2 process
Input 10M-200MHz, output 20M-300MHz, frequency synthesizable PLL, UMC 0.18um GII Logic process....
2947
0.118
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 20MHz - 300MHz, UMC 0.18um G2 process
Input 10M-200MHz, output 20M-300MHz, frequency synthesizable PLL, UMC 0.18um GII Logic process....
2948
0.118
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 20MHz - 300MHz, UMC 55nm LP process
Input 10M-200MHz, output 20M-300MHz, frequency synthesizable PLL, UMC 55nm LP/RVT Low-K Logic process....
2949
0.118
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 25MHz - 400MHz, UMC 0.11um HS/AE process
Input 10-200MHz, output 25-400MHz, frequency synthesizable PLL, UMC 0.11um HS/AE Logic process, It has lock detector function....
2950
0.118
PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 25MHz - 400MHz, UMC 0.13um SP/FSG process
Input 10M-200MHz, output 25M-400MHz, frequency synthesizable PLL, UMC 0.13um SP/FSG Logic process....