Design & Reuse
arrow A/D Converter (ADC) (519)
arrow Amplifier (103)
arrow Analog Comparator (16)
arrow Analog Filter (27)
arrow Analog Front Ends (37)
arrow Analog Multiplexer (3)
arrow Analog Subsystems (5)
arrow Clock Synthesizer (90)
arrow D/A Converter (DAC) (213)
arrow DC-DC Converter (99)
arrow DLL (743)
arrow Oscillator (337)
arrow Oversampling Modulator (8)
arrow PLL (1737)
arrow Power Management (915)
arrow RF Modules (91)
arrow Sensor (62)
arrow Sensors and Monitors (88)
arrow Temperature Sensor (135)
arrow Other (266)
5494 IP
4201
0.0
Ultra Low Power 8-bit ADC - Ultra Low Voltage (1V), Ultra Low Power (850nA) LFoundry (SMIC) 0.15 μm
This macro-cell is a general purpose, ultra low power, 8-bit, time-based Analog-to-Digital Converter (ADC) core designed for LFoundry 0.15µm LF150 CMO...
4202
0.0
Ultra low Power High Speed 150MHz integer-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 150 MHz is required to lock to an incoming clock source and produce an output clock available at 130nm....
4203
0.0
Ultra low Power High Speed 400MHz lnteger-N PLL IP Core
An ultra-low-power programmable fractional-N at 400MHz, phase-locked loop (PLL) for frequency synthesis available at 110nm....
4204
0.0
Ultra low Power High Speed 500MHz integer-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 500MHz is required to lock to an incoming clock source and produce an output clock available at 22nm....
4205
0.0
Ultra low Power High Speed 600MHz lnteger-N PLL IP Core
An ultra-low-power programmable fractional-N at 600MHz, phase-locked loop (PLL) for frequency synthesis available at 22nm....
4206
0.0
Ultra low Power High Speed 800MHz Frac-N PLL IP Core
A programmable on-the-fly Fractional-N PLL at 800MHz is required to lock to an incoming clock source and produce an output clock available at 110nm....
4207
0.0
Ultra Low Power PMU - Shunt regulator SilTerra 0.18 μm
This macro-cell is an ultra low consumption Power Management Unit (PMU) core designed for Silterra 0.18µm C18G CMOS technology TO (thick oxide) and HP...
4208
0.0
Ultra Low Power PMU - Ultra Low Voltage (Vin > 1.2V), Ultra Low Power (6µW) LFoundry 0.15 μm
This macro-cell is an ultra low consumption Power Management Unit (PMU) core designed for LFoundry 0.15µm LF150 CMOS technology STD (Standard) and LP ...
4209
0.0
Ultra low-power crystal-based 32 kHz oscillator in TSMC 12FFC+
OSC-XT-32k-T12FFC.01_TSMC_12_FFC+ is an ultra-low power crystal-based oscillator in TSMC 12FFC+ for accurate 32 kHz clock generation in the SoC Always...
4210
0.0
Ultra-low power 32-kHz RC oscillator in TSMC 55uLP
qOSC-RC-LP-32k-co.01_TSMC_55_uLP is an ultra-low power 32 kHz RC oscillator in TSMC 55uLP. The Always-On domain, over which the power islets emerge, r...
4211
0.0
Ultra-low power & Low frequency XTAL 32 kHz oscillator TSMC 40uLPeFlash
qOSC-XTAL-LP-32k-co.02_TSMC_40_uLPeF is a low frequency crystal oscillator in TSMC 40uLPeF. The Always-On domain, over which the power islets emerge, ...
4212
0.0
Ultra-low power 32 kHz RC oscillator in TSMC 40 ULPeFlash
qOSC-RC-LP-32k-co.01_TSMC_40_uLPeF is an ultra-low power 32 kHz RC oscillator in TSMC 40ULPeFlash for IoT SoC and ULP MCU applications requiring fast ...
4213
0.0
Ultra-low power 32-kHz RC oscillator in TSMC 55uLPeFlash
qOSC-RC-LP-32k-co.01_TSMC_55_uLPeF is an ultra-low power 32 kHz RC oscillator in TSMC 55uLPeF. The Always-On domain, over which the power islets emerg...
4214
0.0
Ultra-low power crystal-based 32 kHz oscillator in TSMC 55uLP
qOSC-XTAL-LP-32k-co.01_TSMC_55_ULP is a low frequency crystal oscillator in TSMC 55ULP. The Always-On domain, over which the power islets emerge, requ...
4215
0.0
Ultra-low power Low frequency XTAL 32 kHz oscillator in TSMC 55uLPeFlash
qOSC-XTAL-LP-32k-co.01_TSMC_55_uLPeF is a low frequency crystal oscillator in TSMC 55ULPeF. The Always-On domain, over which the power islets emerge, ...
4216
0.0
Ultra-low Power Voltage Reference
...
4217
0.0
Ultra-low power, high SFDR ring-oscillator-based PLL-5GHz-7.5GHz
InCirT’s APLL7p5GGF22 is the ring-oscillator based analogue-PLL which provides offers a wide turning range (from 5GHz to 7.5GHz) and low power consump...
4218
0.0
Ultra-low quiescent capacitor-less LDO voltage regulator in SF 65LFR6LP
qLR-Della-cl-ref-1.8-5.5-0.9-1.4.02_SF_65_LFR6LP is an ultra-low quiescent Capacitor-Less LDO in SF 65LF6LP....
4219
0.0
Ultrasound AFE Transceiver Chip for CMUT Transducers
The MVUS01 ultrasound transducer interface is the first generation of high-voltage (HV) ultrasound ASICs intended for portable medical imaging probes ...
4220
0.0
3mA LDO voltage regulator (1.3V – 3.6V to 1.2V/1.3V/1.5V/1.65V)
130GF_LDO_01 is a capacitor-less regulator designed to supply integrated circuits with stable and precise voltage. The LDO inputs voltage VDD 1.3… 3...
4221
0.0
UMC 130nm Bandgap
The OT0118 is a medium precision, bandgap voltage reference and current reference generator specifically tuned for the UMC 130nm CMOS process....
4222
0.0
UMC L110AELL 110nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4223
0.0
UMC L110AELL 110nm Clock Generator PLL - 30MHz-150MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4224
0.0
UMC L110AELL 110nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4225
0.0
UMC L110AELL 110nm DDR DLL - 24MHz-120MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4226
0.0
UMC L110AELL 110nm DDR DLL - 32MHz-160MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4227
0.0
UMC L110AELL 110nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4228
0.0
UMC L110AELL 110nm Deskew PLL - 30MHz-150MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4229
0.0
UMC L110AELL 110nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4230
0.0
UMC L110AELL 110nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4231
0.0
UMC L110AELL 110nm Spread Spectrum PLL - 30MHz-150MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4232
0.0
UMC L110AELL 110nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4233
0.0
UMC L110HS 110nm Clock Generator PLL - 160MHz-800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4234
0.0
UMC L110HS 110nm Clock Generator PLL - 320MHz-1600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4235
0.0
UMC L110HS 110nm Clock Generator PLL - 80MHz-400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4236
0.0
UMC L110HS 110nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4237
0.0
UMC L110HS 110nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4238
0.0
UMC L110HS 110nm Deskew PLL - 160MHz-800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4239
0.0
UMC L110HS 110nm Deskew PLL - 320MHz-1600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4240
0.0
UMC L110HS 110nm Deskew PLL - 80MHz-400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4241
0.0
UMC L110HS 110nm Spread Spectrum PLL - 160MHz-800MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4242
0.0
UMC L110HS 110nm Spread Spectrum PLL - 320MHz-1600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4243
0.0
UMC L110HS 110nm Spread Spectrum PLL - 80MHz-400MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
4244
0.0
UMC L110LL 110nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4245
0.0
UMC L110LL 110nm Clock Generator PLL - 30MHz-150MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4246
0.0
UMC L110LL 110nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
4247
0.0
UMC L110LL 110nm DDR DLL - 24MHz-120MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4248
0.0
UMC L110LL 110nm DDR DLL - 32MHz-160MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
4249
0.0
UMC L110LL 110nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
4250
0.0
UMC L110LL 110nm Deskew PLL - 30MHz-150MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...