Design & Reuse
Catalog of SIP Cores
System on Chip design resources
25 IP
1
20.0
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...
2
20.0
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...
3
16.0
RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of i...
4
15.5556
SMD RISC-V SDK
Quickly and seamlessly develop, debug and fine-tune applications for Semidynamics RISC-V hardware with the SMD RISC-V SDK. It is a complete software d...
5
5.0
MIPI I3C Master RISC-V based subsystem
RISC-V based MAXVY MIPI I3C master interface has been developed to ease sensor system design architectures in mobile wireless products by providing a ...
6
3.0
RPU-REFLEX-RV — RISC-V Reflexive Energy Layer
A drop-in reflexive hardware layer for RISC-V cores (Ibex, CV32E40P). Connects to irq_external_i — CPU enters WFI sleep, wakes in exactly 2 clock cycl...
7
0.0
Calcite Core-Hub
Meet the Calcite Core Generator, our solution for generating application-level cores that are Linux-capable. Calcite delivers an unparalleled balance ...
8
0.0
Kaveri - RISC V Microcontroller Platform
“Kaveri” is an in-house developed RISC-V based Embedded Application Processor platform from SignOff Semiconductors, created as part of our engineering...
9
0.0
SCR, Syntacore s Family of Customizable Processor IP
State-of-the-art, synthesizable microprocessor core IP with RISC-V ISA: from the minimalistic MCU core for the deeply-embedded applications to the 1GH...
10
0.0
Security Enclave IP based on RISC-V
The eSecure IP is a single subsystem for SoC/ASIC/FPGA to address key security challenges, playing the role of root-of-trust. The module is highly fle...
11
0.0
CHI NIC IP
The CHI Network Interconnect (CHI NIC) is a scalable, high-performance interconnect IP designed to connect processors, memory subsystems, and peripher...
12
0.0
CHI NOC IP
The CHI-based mesh interconnect is a scalable, high-performance communication fabric designed to connect a large number of nodes in modern SoC archite...
13
0.0
HiFive Unmatched Rev B
The development board is powered by the SiFive Freedom U740 (FU740), an SoC that includes a high-performance multi-core, 64-bit dual-issue, superscala...
14
0.0
Digital and mixed-signal IP and ASIC RISC-V reference design for USB Type-C/PD power adapter/charger
IQonIC Works USB-C/PD power adapter IP includes components required to build an integrated programmable power supply (PPS) charger solution.The USB Ty...
15
0.0
RISC V - CORE DEVELOPMENT
RISC-V (pronounced risk-five ) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015...
16
0.0
RISC-V Acceleration Factory
A complete product suite for integrating, verifying, and debugging embedded systems to increase software speed-power ratios 10 to 100 times. With Blue...
17
0.0
RISC-V Platform-Level Interrupt Controller (PLIC) IP
IQonIC Works RISC-V PLIC IP is a platform-level interrupt controller conforming to the RISC-V PLIC specification, for use in systems with a large numb...
18
0.0
RISC-V SoC Universa
Universa RISC-V-based SoC is a ready-to-use HW/SW framework for developing any SoC solution. Brought to you by Vtool, a verification EDA company, RISC...
19
0.0
RISC-V Timer IP
IQonIC Works RISC-V Timer IP comprises a suite of timers, each conforming to the RISC-V standard machine timer specification. For simple applications ...
20
0.0
AndeSight IDE
AndeSight™ has Standard, MCU, RDS and Lite versions and is an Eclipse-based integrated development environment that provides an efficient way to...
21
0.0
Multi-Protocol NIC IP
The Network Interconnect (NIC) is a scalable, high-performance IP designed to connect processors, memory controllers, accelerators, and peripheral sub...
22
0.0
Multi-Protocol NoC IP
The mesh interconnect is a scalable, high-performance communication fabric designed to connect a large number of components in modern SoC architecture...
23
0.0
AXI NIC IP
The AXI Network Interconnect (AXI NIC) is a scalable, high-performance IP for connecting processors, memory controllers, and peripherals in modern SoC...
24
0.0
AXI NoC IP
The mesh interconnect is a scalable, high-performance communication fabric designed to connect a large number of master and slave devices in complex S...
25
0.0
Azurite Core Hub Generators
The Azurite Core Hub Generator utilizes InCore's FlexiCore™ Technology to build a highly parameterized and configurable Core-Hub™ Gene...