Design & Reuse
17 IP
1
33.0
General Purpose & Bridge DMA
LeWiz provides a range of direct memory access controllers (DMA) and bus bridge IP cores. These are customizable to user’s SoC or design requirements....
2
13.0
AXI4 Multi-Channel DMA Controller (Configurable, typically up to 1024 DMA Channels)
The Digital Blocks DB-DMAC-MC-AMBA SystemVerilog RTL IP Core is a Scatter-Gather (SG) Direct Memory Access (DMA) Controller with Master AXI4 Interconn...
3
12.0
AHB Multi-Channel DMA Controller
The Digital Blocks DB-DMAC-MC-AHB Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 1 – 16 independent data transfers. The Direct Memor...
4
5.0
AXI4 Multi-Channel DMA Controller (fixed 2,4,8,16 DMA Channels)
The Digital Blocks DB-DMAC-MC-AXI Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 2, 4, 8, or 16 independent data transfers. The Dire...
5
0.0
Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers
The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Mem...
6
0.0
AHB Scatter-Gather DMA Controller
The eSi-SG-DMA core can be used to implement 1D and 2D memory-to-memory, memory-to-peripheral, peripheral-to-memory and peripheral-to-peripheral data ...
7
0.0
High Channel Count DMA IP Core for PCI-Express
The High Channel Count (HCC) DMA IP core for PCI-Express is a powerful PCIe Endpoint with multiple industry standard AXI Interfaces. This IP addresses...
8
0.0
Direct Memory Access Controller IP Core
The DMA_CTRL core implements a low-power, single-channel Direct Memory Access (DMA) controller that is used to transfer data across a bus to and from ...
9
0.0
DMA - DDMA - Direct Memory Access Controller
The DDMA is a four-channel Direct Memory Access Controller. Its purpose is to transfer data between memories and peripherals to reduce CPU utilization...
10
0.0
DMA Controller with AHB IP
SmartDV’s DMA Controller with AHB IP is a silicon-proven solution engineered to enable high-throughput, low-latency data transfers with minimal CPU ov...
11
0.0
DMA Controller with AXI IP
SmartDV’s DMA Controller with AXI IP is a silicon-proven solution designed to deliver high-bandwidth, low-latency data transfers with minimal processo...
12
0.0
DMA Controller with OCP IP
DMA Controller with OCP interface is full featured, easy-to-use, synthesizable design that can be used with OCP based systems as a controller to trans...
13
0.0
DMA Controller with TileLink IP
DMA Controller with TileLink interface is full featured, easy-to-use, synthesizable design that can be used with TileLink based systems as a controlle...
14
0.0
Multi-Channel Flex DMA IP Core for PCIe
The Multi-Channel DMA IP Core for PCI-Express is a powerful PCIe Endpoint with multiple industry standard AXI Interfaces. Up to 16 independent AXI Str...
15
0.0
Multi-Channel Streaming DMA Controller
The MC-SDMA IP core implements a highly configurable, bandwidth-efficient, and easy-to-use Direct Memory Access (DMA) controller that transfers data b...
16
0.0
AXI4 to/from AXI4-Stream Scatter-Gather DMA
The AXI4-SGDMA IP core implements a Host-to-Peripheral (H2P), or a Peripheral-to-Host (P2H) Direct Memory Access (DMA) engine, which interfaces the ho...
17
0.0
AXI4 to/from Stream DMA
The AXI4-DMA IP core implements a Direct Memory Access (DMA) engine that efficiently moves data between AXI4-Stream peripherals and a memory-mapped AX...