Design & Reuse
Catalog of SIP Cores
System on Chip design resources
16 IP
1
13.0
AXI4 SG Multi-Channel DMA Controller (configurable 1 to 126 DMA Channels, configurable 64, 128, 256 or 512 bits data path)
The Digital Blocks DB-DMAC-MCn-AXI4 SystemVerilog RTL IP Core is a Scatter-Gather (SG) Direct Memory Access (DMA) Controller for AMBA AXI4 systems, wi...
2
12.0
AHB5 SG Multi-Channel DMA Controller (configurable 1 to 126 DMA Channels, configurable 64, 128, 256 or 512 bits data path)
The Digital Blocks DB-DMAC-MCn-AHB5 SystemVerilog RTL IP Core is a Scatter-Gather (SG) Direct Memory Access (DMA) Controller for AMBA 5 AHB systems, w...
3
10.0
Direct Memory Access DMA Controller IP Core
The DMA_CTRL core implements a low-power, single-channel Direct Memory Access (DMA) controller that is used to transfer data across a bus to and from ...
4
10.0
Multi-Channel Streaming DMA Controller
The MC-SDMA IP core implements a highly configurable, bandwidth-efficient, and easy-to-use Direct Memory Access (DMA) controller that transfers data b...
5
10.0
AXI4 to/from AXI4-Stream Scatter-Gather DMA
The AXI4-SGDMA IP core implements a Host-to-Peripheral (H2P), or a Peripheral-to-Host (P2H) Direct Memory Access (DMA) engine, which interfaces the ho...
6
10.0
AXI4 to/from Stream DMA
The AXI4-DMA IP core implements a Direct Memory Access (DMA) engine that efficiently moves data between AXI4-Stream peripherals and a memory-mapped AX...
7
5.0
AXI4 SG Multi-Channel DMA Controller (fixed 2,4,8,16 DMA Channels, fixed 64, 128 or 256 bits data path)
The Digital Blocks DB-DMAC-MCn-AXI4 SystemVerilog RTL IP Core is a Scatter-Gather (SG) Direct Memory Access (DMA) Controller for AMBA AXI4 systems wit...
8
0.0
Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers
The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Mem...
9
0.0
General Purpose & Bridge DMA
LeWiz provides a range of direct memory access controllers (DMA) and bus bridge IP cores. These are customizable to user’s SoC or design requirements....
10
0.0
AHB Scatter-Gather DMA Controller
The eSi-SG-DMA core can be used to implement 1D and 2D memory-to-memory, memory-to-peripheral, peripheral-to-memory and peripheral-to-peripheral data ...
11
0.0
High Channel Count DMA IP Core for PCI-Express
The High Channel Count (HCC) DMA IP core for PCI-Express is a powerful PCIe Endpoint with multiple industry standard AXI Interfaces. This IP addresses...
12
0.0
DMA - DDMA - Direct Memory Access Controller
The DDMA is a four-channel Direct Memory Access Controller. Its purpose is to transfer data between memories and peripherals to reduce CPU utilization...
13
0.0
DMA Controller with AHB IP
SmartDV's DMA Controller with AHB IP is a silicon-proven, fully featured Direct Memory Access solution purpose-built for SoC designs requiring efficie...
14
0.0
DMA Controller with AXI IP
SmartDV's DMA Controller with AXI IP is a silicon-proven, fully featured Direct Memory Access solution purpose-built for SoC designs requiring efficie...
15
0.0
Multi-Channel Flex DMA IP Core for PCIe
The Multi-Channel DMA IP Core for PCI-Express is a powerful PCIe Endpoint with multiple industry standard AXI Interfaces. Up to 16 independent AXI Str...
16
0.0
AXI4 High Throughput SG Multi-Channel DMA Controller (configurable 1 to 126 DMA Channels, configurable 64, 128, 256 or 512 bits data path)
The Digital Blocks DB-DMAC-MCn-AXI4-HT SystemVerilog RTL IP Core is a high-throughput Scatter Gather (SG) Direct Memory Access (DMA) Controller for AM...