Design & Reuse
11 IP
1
50.0
Quad SPI Controller
The Serial Peripheral Interface or SPI-bus is a simple 4- wire serial communications interface used by many peripheral chips that enable the controlle...
2
8.0
Smart Card Reader Controller Core
Implements an interface and controller for communicating between smart cards and host systems using a variety of standard system interfaces. The SCR ...
3
3.0
FPGA Supervisor
The GRSCRUB is an FPGA configuration supervisor responsible for programming and scrubbing the FPGA configuration memory to prevent accumulation of err...
4
0.3729
Dolphin GPIO Controller
Dolphin Technology provides General Purpose I/O IP which cosists of up to 32 I/O ports that can be programmed individually for input, output, or bidir...
5
0.3729
Dolphin GPIO Controller
Dolphin Technology provides General Purpose I/O IP which cosists of up to 32 I/O ports that can be programmed individually for input, output, or bidir...
6
0.3729
Dolphin Octal SPI Controller
Dolphin Octa SPI Controller and PHY IP supports the fastest access frequency of 200MHz, with DDR Mode and Double Transfer Rate (DTR) Protocol enabling...
7
0.3729
Dolphin Quad SPI Controller
Dolphin Technology provides Quad SPI Controller IP which enables access to a QSPI flash device through read, write and erase operations. The Quad SPI ...
8
0.3729
PSRAM UHS Controller
DTI UHS PSRAM external memory controller is interfaced to control PSRAM devices. The controller is fully programmable and configurable, flexible to cu...
9
0.0
I2C Controller
I2C Dual mode IP ( master and slave mode) with APB interface to support the standard I2C Bus Protocol and APB5 Interface on the Application side. It ...
10
0.0
Master/Slave Octal SPI Controller
Implements a controller for a single-, dual-, quad-, or octal-lane Serial Peripheral Interface (SPI) bus, which can operate either as a master or as a...
11
0.0
Expanded Serial Peripheral Interface (xSPI) Slave Controller
The MAXVY's JESD251 Expanded Serial Peripheral Interface Slave controller is provides high data throughput, low signal count, and limited backward com...