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139 IP
1
52.0
MIPI D-PHY CSI-2 RX (Receiver) in GlobalFoundries 22FDX
The MXL-DPHY-CSI-2-RX-GF-22FDX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...
2
52.0
MIPI D-PHY DSI RX (Receiver) in GlobalFoundries 22FDX
The MXL-DPHY-DSI-RX-GF-22FDX is a high-frequency, low-power, low-cost, source-synchronous, physical layer supporting the MIPI Alliance Specification f...
3
50.0
MIPI D-PHY Universal Tx / Rx v1.1 @1.5ghz Ultra Low Power for IoT & Wearables
Arasan 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on TSMC 22nm process technology for SoC designs. Arasan’s D-PHY IP is ava...
4
30.0
Camera SLVS-EC/MIPI D-PHY/sub-LVDS/CMOS1.8 combo Receiver 5.0G/2.5G/1Gbps/166MHz 8-Lane
* The CL12842M8RM3AM5AIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and DSP. The CL1284...
5
30.0
Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
* The LVDS/Sub-LVDS/DPHY Combo TX converts parallel RGB data and 7/8/10 bits of CMOS parallel data into serial data streams. A phase-locked clock is t...
6
20.0
MIPI D-PHY ( DPHY ) 1.2 RX
Silicon Library's MIPI D-PHY ( DPHY ) 1.2 RX PHY IP supports data rates up to 1.5Gbps. This IP includes two PLLs. This silicon proven IP is available...
7
20.0
MIPI D-PHY ( DPHY ) 1.2 TX
Silicon Library's MIPI D-PHY ( DPHY ) 1.2 TX PHY IP supports data rates up to 1.5Gbps and 2.5Gbps per lane (in HS), depending on the technology node. ...
8
20.0
MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
9
20.0
MIPI D-PHY Bidirectional 2 Lanes in SMIC (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
10
20.0
MIPI D-PHY Bidirectional 2 Lanes in TSMC (40nm, 28nm, 16nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
11
20.0
MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
12
20.0
MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
13
20.0
MIPI D-PHY Bidirectional 4 Lanes in SMIC (40nm, 28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
14
20.0
MIPI D-PHY Bidirectional 4 Lanes in TSMC (40nm, 28nm, 16nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
15
20.0
MIPI D-PHY Rx-Only 2 Lanes in GF (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
16
20.0
MIPI D-PHY Rx-Only 2 Lanes in SMIC (40nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
17
20.0
MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
18
20.0
MIPI D-PHY Rx-Only 2 Lanes in UMC (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
19
20.0
MIPI D-PHY Rx-Only 4 Lanes in GF (28nm, 12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
20
20.0
MIPI D-PHY Rx-Only 4 Lanes in SMIC (40nm, 28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
21
20.0
MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
22
20.0
MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
23
20.0
MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
24
20.0
MIPI D-PHY Tx-Only 4 Lanes in GF (12nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
25
20.0
MIPI D-PHY Tx-Only 4 Lanes in SMIC (28nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
26
20.0
MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6, N6C)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
27
20.0
MIPI D-PHY Tx-Only 4 Lanes in UMC (28nm, 22nm)
Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...
28
11.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
29
11.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 22ULL
The MXL-DPHY-CSI-2-TX+-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
30
11.0
MIPI D-PHY DSI RX (Receiver/Peripheral) in UMC 22ULP/22ULL
The MXL-DPHY-DSI-RX-U-22ULP-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
31
11.0
MIPI D-PHY IP 4.5Gbps in TSMC N7
The MXL-DPHY-DSI-TX-T-N07 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...
32
11.0
MIPI D-PHY Universal IP in TSMC 28HPC+
The MXL-DPHY-UNIV-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
33
11.0
MIPI D-PHY Universal IP in UMC 28HPC+
The MXL-DPHY-UNIV-U-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for...
34
6.7619
MIPI D-PHY TRx 2.1Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
35
6.7619
MIPI D-PHY TRx (5nm)
The MIPI D-PHY IP is a hardmacro PHY for CSI RX or DSI TX. IO pads and ESD structures are included. Extensive built-in self test features such as loop...
36
6.7619
MIPI D-PHY TRx 2.1Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
37
6.7619
MIPI D-PHY TRx 2.5Gbps (11nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
38
6.7619
MIPI D-PHY TRx 2.5Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
39
6.7619
MIPI D-PHY TRx 2.5Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
40
6.7619
MIPI D-PHY TRx 2.5Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
41
6.7619
MIPI D-PHY TRx 2.5Gbps (28nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
42
6.7619
MIPI D-PHY TRx 4.5Gbps (5nm)
The MIPI D-PHY IP supports data rates of up to 4.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
43
6.7619
MIPI D-PHY TRx 4.5Gbps (8nm)
The MIPI D-PHY IP supports data rates of up to 4.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
44
6.0
MIPI Rx D-PHY
...
45
5.7619
MIPI D-PHY TRx 2.15Gbps (28nm)
The MIPI D-PHY IP supports data rates of up to 2.15Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provi...
46
5.7619
MIPI D-PHY TRx 2.1Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
47
1.0
Camera MIPI D-PHY v1-1 1.5Gbps / sub-LVDS combo Receiver 4-Lane
The CL12662K4R1AM2JIP1500 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processer) and DSP. The CL12662K4...
48
1.0
MIPI D-PHY TX/CSI2 Link Controller
CD12631S4TIP is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system. This LINK IP is a soft macro IP that h...
49
1.0
MIPI D-PHY/sub-LVDS combo Transmitter 1.5G/1.0Gbps 4-Lane
The CL12661K4T1AM2JIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System. The CL12661K4T1AM2JIP is designed to support...
50
1.0
MIPI UniPro Controller - v1.6
To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI) Alliance was created to define and promote open...