Design & Reuse
10 IP
1
30.0
LDPC Encoder / Decoder
Nand Flash write cycles are limited. An ECC detects and corrects failed operations, increasing the lifetime of the Nand Flash memory. For Nand Flash-b...
2
20.0
BCH Encoder / Decoder
The IP-Maker BCH Encoder/Decoder is full featured, easy to use into FPGA and SoC designs. To be easily integrated with the system interface, the IP co...
3
16.0
8b/10 Decoder
The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium. It ensures enough state tr...
4
10.0
BCH Error Correcting Code ECC
BCH code statistics for different `$mm` `$tt` Zero latency, low gate count, low power, asynchronous BCH Code based Error Correction FEC: T...
5
6.0
5G Polar encoder/decoder
TC5300 is an efficient Polar encoder/decoder Core solution compliant with 3GPP NR (5G) specifications. The Core is fully validated and has been select...
6
6.0
LTE/NR Small Block Lengths Decoder
TC5390 is a decoder IP Core compliant with the small block lengths coding scheme for UCI as defined by 3GPP 4G-LTE and 5G-NR specifications. A single...
7
5.0
Hamming Code ECC
The RTL is configurable for number of message bits that need ECC protection. Once RTL is generated it is fixed. 1- RTL has no RAMS/ROMS/Flip Flop...
8
3.0
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from the compressed data. ...
9
0.0
NCR Processor
NCR (Network Clock Reference) is a procedure to provide the master clock (i.e. time information) of the satellite to all its user terminals. Typically...
10
0.0
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from the compressed data. ...