Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow CEI (11)
arrow Cell / Packet (6)
arrow Error Correction/Detection (151)
arrow Ethernet (168)
arrow Fibre Channel (1)
arrow HDLC (6)
arrow Interleaver/Deinterleaver (1)
arrow Modulation/Demodulation (18)
arrow Optical/Telecom (36)
arrow Other (13)
42 IP
1
120.0
Silicon Proven 1G Ethernet PHY IP as Whitebox
1G Ethernet PHY IP Core is available for licensing as a Whitebox IP, with unlimited usage and full modification rights granted to the customer, ensuri...
2
101.0
Ethernet 400G PCS IP
SmartDV's Ethernet 400G PCS IP is an FPGA-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring the highest...
3
101.0
Ethernet 800G PCS IP
SmartDV's Ethernet 800G PCS IP is a fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring the highest ratified Ethe...
4
76.0
Ethernet 1.6T PCS IP
SmartDV's Ethernet 1.6T PCS IP is a next-generation Physical Coding Sublayer solution purpose-built for SoC designs requiring the highest available Et...
5
20.0
100Base-T1 Automotive Ethernet PHY
100Base-T1 Automotive Ethernet PHY...
6
20.0
Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
"The CetraC Switch IP core is the ideal solution to interconnect any TSN, Ethernet and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...
7
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
8
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
9
10.0
UALink PCS
The Chip Interfaces UA Link PCS IP Core is a high-performance, silicon-agnostic and fully compliant Physical Coding Sublayer (PCS) implementation of U...
10
10.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY (in production)...
11
10.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
12
10.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
13
10.0
Gigabit Ethernet PHY (Modification Right)
Gigabit Ethernet PHY Modification Right (in production)...
14
0.0
2.5G BaseT Ethernet PHY IP in TSMC 22ULL
The 2.5G BaseT Ethernet PHY IP Core provides a robust, production-proven physical layer solution for SoCs requiring high-speed, low-power Ethernet con...
15
0.0
2.5G BaseT Ethernet PHY IP in TSMC 28HPC+
The 2.5G BaseT Ethernet PHY IP built on the 28nm process delivers a cost-effective and performance-optimized physical layer solution for a broad spect...
16
0.0
5/10/40G Ultra Low Latency MAC PCS with AXI-4 and UCIe support
This IP is optimized for AI/ML workloads and lowest possible latency. It is not meant to be a generic 1G to 10G MAC – it only supports 5G and 10G ope...
17
0.0
10/25/40/100G Ethernet PCS/PMA
The Chevin Technology PCS/ PMA is an IP core that simplifies the FPGA integration of Ultra low-latency 10/25/40/100G Ethernet connectivity in Intel an...
18
0.0
10/25/40/100G MAC/PCS Ethernet IP Core
The 10/25/40/100G MAC IP core is a Low-Latency Ethernet MAC with a latency of 44.8ns in 2749 LUTs for 10Gbit/s and 20.5ns in 2680 LUTs for 25Gbit/s. W...
19
0.0
100M-1000M BaseT1 Ethernet PHY IP in TSMC 22ULL
The 100M/1000M Base-T1 Ethernet PHY IP Core provides single-pair Ethernet connectivity with full IEEE 802.3bw and 802.3bp compliance, enabling reliabl...
20
0.0
100M/1000M Base-T1 Ethernet PHY IP in TSMC 28HPC+
The 100M/1000M Base-T1 Ethernet PHY IP Core delivers single-pair Ethernet connectivity with full IEEE compliance in a 28nm process node. Supporting bo...
21
0.0
10G Ethernet PHY IP In SAMSUNG 14LPP
The 10G Ethernet PHY IP Core, designed in 14nm FinFET technology, enables next-generation high-speed connectivity with full compliance to IEEE 802.3 E...
22
0.0
25G LL MAC /PCS Ethernet IP for FPGA
The Chevin Technology 25G LL MAC/PCS combines the 25G MAC and 25G PCS IP cores to obtain the lowest possible latency while simplifying the integration...
23
0.0
25Gbit/s Ethernet PCS
The Chevin Technology 25GPCS provides Ultra low-latency 25Gbit/s Ethernet connectivity in Xilinx Virtex® UltraScale™ FPGAs. Ultra-low latency is achie...
24
0.0
16G Ethernet SerDes PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 16 ...
25
0.0
16G Ethernet SerDes PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 16 ...
26
0.0
UALink DL
he Chip Interfaces UA Link DL IP Core is a high-performance, silicon-agnostic and fully compliant Data Layer implementation of UALink_200 specifi cati...
27
0.0
UALink TL
The Chip Interfaces UA Link TL IP Core is a high-performance, silicon-agnostic and fully compliant Transaction Layer implementation of UALink_200 spec...
28
0.0
UDP/IP - 10/25/40/100G Ethernet UDP/IP Offload Engine
Chevin Technology’s 10/25/40/100G UDP/IP Offload Engine for FPGAs has low latency and bandwidth overhead, as it sends packets of data without confirm...
29
0.0
1G Ethernet Whitebox PHY IP - ST 28FDSOI
The GPHY is a highly integrated single chip for Giga10/100/1000 Ethernet application with low powerconsumption. It supports 10BASE-T, 100BASE-TX, 1000...
30
0.0
Gigabit Ethernet PHY (1000Base-T)
The DSP-Based GBE IP (development) is a fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-T, 100BASE-TX and 10...
31
0.0
USXGMII Ethernet PCS (PCSR_X)
The Cadence USXGMII PCS (PCSR_X) IP provides the logic required to integrate a USXGMII, 5GBASE-R, or 10GBASE-R PCS into any syst The Cadence USXGMI...
32
0.0
Ethernet 100G PCS IP
SmartDV's Ethernet 100G PCS IP is a silicon-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring reliable,...
33
0.0
Ethernet 10G PCS IP
SmartDV's Ethernet 10G PCS IP is a silicon-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring reliable 1...
34
0.0
Ethernet 10M/100M/1G PCS IP
SmartDV's Ethernet 10M/100M/1G PCS IP is a silicon-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring fl...
35
0.0
Ethernet 2.5G PCS IP
SmartDV's Ethernet 2.5G PCS IP is a silicon-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring 2.5 Gigab...
36
0.0
Ethernet 200G PCS IP
SmartDV's Ethernet 200G PCS IP is an FPGA-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring high-bandwi...
37
0.0
Ethernet 25G PCS IP
SmartDV's Ethernet 25G PCS IP is a silicon-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring reliable, ...
38
0.0
Ethernet 40G PCS IP
SmartDV's Ethernet 40G PCS IP is a silicon-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring reliable 4...
39
0.0
Ethernet 50G PCS IP
SmartDV's Ethernet 50G PCS IP is a silicon-proven, fully featured Physical Coding Sublayer solution purpose-built for SoC designs requiring reliable, ...
40
0.0
Ethernet Cyclic FEC IP
SmartDV's Ethernet Cyclic FEC IP is a silicon-proven, fully featured Forward Error Correction solution purpose-built for SoC designs requiring reliabl...
41
0.0
Ethernet XAUI PCS
Integrates MAC IP to a broad range of PHY and SerDes IP The Cadence Ethernet XAUI Physical Coding Sublayer (PCS) IP provides the logic required to ...
42
0.0
Synopsys High Speed Ethernet PCS IP up to 200G
The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...