Design & Reuse
22 IP
1
60.0
Silicon Proven 1G Ethernet PHY IP as Whitebox
1G Ethernet PHY IP Core is available for licensing as a Whitebox IP, with unlimited usage and full modification rights granted to the customer, ensuri...
2
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
3
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
4
20.0
Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
"The CetraC Switch IP core is the ideal solution to interconnect any TSN, Ethernet and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...
5
15.0
2.5G BaseT Ethernet PHY IP in TSMC 22ULL
The 2.5G BaseT Ethernet PHY IP Core provides a robust, production-proven physical layer solution for SoCs requiring high-speed, low-power Ethernet con...
6
15.0
2.5G BaseT Ethernet PHY IP in TSMC 28HPC+
The 2.5G BaseT Ethernet PHY IP built on the 28nm process delivers a cost-effective and performance-optimized physical layer solution for a broad spect...
7
15.0
100M-1000M BaseT1 Ethernet PHY IP in TSMC 22ULL
The 100M/1000M Base-T1 Ethernet PHY IP Core provides single-pair Ethernet connectivity with full IEEE 802.3bw and 802.3bp compliance, enabling reliabl...
8
15.0
100M/1000M Base-T1 Ethernet PHY IP in TSMC 28HPC+
The 100M/1000M Base-T1 Ethernet PHY IP Core delivers single-pair Ethernet connectivity with full IEEE compliance in a 28nm process node. Supporting bo...
9
14.0
USXGMII Ethernet PCS (PCSR_X)
The Cadence USXGMII PCS (PCSR_X) IP provides the logic required to integrate a USXGMII, 5GBASE-R, or 10GBASE-R PCS into any system on chip (SoC). The...
10
14.0
Ethernet XAUI PCS
Integrates MAC IP to a broad range of PHY and SerDes IP The Cadence Ethernet XAUI Physical Coding Sublayer (PCS) IP provides the logic required to in...
11
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
12
10.0
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY...
13
10.0
UALink PCS
The Chip Interfaces UA Link PCS IP Core is a high-performance, silicon-agnostic and fully compliant Physical Coding Sublayer (PCS) implementation of U...
14
10.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY (in production)...
15
10.0
Gigabit Ethernet PHY (Modification Right)
Gigabit Ethernet PHY Modification Right (in production)...
16
0.0
5/10/40G Ultra Low Latency MAC PCS with AXI-4 and UCIe support
This IP is optimized for AI/ML workloads and lowest possible latency. It is not meant to be a generic 1G to 10G MAC – it only supports 5G and 10G ope...
17
0.0
10/25/40/100G Ethernet PCS/PMA
The Chevin Technology PCS/ PMA is an IP core that simplifies the FPGA integration of Ultra low-latency 10/25/40/100G Ethernet connectivity in Intel an...
18
0.0
10/25/40/100G MAC/PCS Ethernet IP Core
The 10/25/40/100G MAC IP core is a Low-Latency Ethernet MAC with a latency of 44.8ns in 2749 LUTs for 10Gbit/s and 20.5ns in 2680 LUTs for 25Gbit/s. W...
19
0.0
10G Ethernet PHY IP In SAMSUNG 14LPP
The 10G Ethernet PHY IP Core, designed in 14nm FinFET technology, enables next-generation high-speed connectivity with full compliance to IEEE 802.3 E...
20
0.0
25G LL MAC /PCS Ethernet IP for FPGA
The Chevin Technology 25G LL MAC/PCS combines the 25G MAC and 25G PCS IP cores to obtain the lowest possible latency while simplifying the integration...
21
0.0
25Gbit/s Ethernet PCS
The Chevin Technology 25GPCS provides Ultra low-latency 25Gbit/s Ethernet connectivity in Xilinx Virtex® UltraScale™ FPGAs. Ultra-low latency is achie...
22
0.0
UDP/IP - 10/25/40/100G Ethernet UDP/IP Offload Engine
Chevin Technology’s 10/25/40/100G UDP/IP Offload Engine for FPGAs has low latency and bandwidth overhead, as it sends packets of data without confirm...