Design & Reuse
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arrow Error Correction/Detection (147)
arrow Ethernet (171)
arrow Fibre Channel (1)
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arrow Modulation/Demodulation (22)
arrow Optical/Telecom (37)
arrow Other (14)
14 IP
1
25.0
1G/10G TCP/IP Hardware Stack
The TCPIP-1G/10G core implements a complete TCP/IP Hardware Protocol Stack. More capable than many offloading engines, it allows systems to connect to...
2
12.0
SONET/SDH OC-3 / OC-12 Transceiver/CDR PHY
Innovative architecture to meet the SDH/ Sonet Jitter Spec utilizing deep sub-micron single poly CMOS process Fully in compliance with ANSI, Bellcore...
3
12.0
USB 2.0 OTG On-The-Go Transceiver PHY
SMS USB 2.0 OTG Transceiver is LS/FS/HS compliant with USB 2.0 specification and includes VBUS comparators, Switched Pullup & Pulldown resistors, data...
4
10.0
100G UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...
5
10.0
40G/50G UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...
6
6.0
OSU processor, optimized for E1/FE/GE services with Ethernet over SDH over OTU0/OTU1 lines
The TPS3215MP OSU processor is an IP Core solution designed for Xilinx FPGAs. TPS3215MP processors accept 4x FE/GE and 4x E1 client signals, process a...
7
6.0
OSU/OTN processor, optimized for E1/STM1/OC3/STM4/OC12/FE/GE services over OTU0/OTU1 lines
The TPS3204MP OSU processor is an IP Core solution designed for Xilinx FPGAs. TPS3204MP processors accept 4x STM1/STM4/FE/GE and 4x E1 client signals,...
8
5.0
DiFi IP core
The DiFi IP core is a highly scalable and silicon agnostic implementation of the IEEE-ISTO Std 4900-2021: Digital IF Interoperability Standard v1.2.1 ...
9
4.0
Smart Grid PLC Baseband Processor
The ntG3_BBP is a fully compliant ITU-T G.9903 baseband modem that can be used in a wide range of smart grid applications over power lines, including ...
10
4.0
Home Plug Green PHY MAC Layer TX/RX
ntHPGP_MAC IP core implements “Connectionless CSMA-Only Level-0 CCo“ MAC Layer functionality with Passive Coordination, as detailed in Chapter 5 of “H...
11
1.0
10G/25G UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...
12
1.0
UDP/IP Hardware Protocol Stack
Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...
13
0.0
Configuration-over-Ethernet (CoE) IP
SmartDV’s Configuration-over-Ethernet (CoE) IP enables remote device configuration and control over standard Ethernet networks, simplifying system des...
14
0.0
ETHERNET Switch IP
Ethernet Switch core is a full-featured, easy-to-use, synthesizable design that supports various Ethernet IEEE standards. Through its Ethernet compati...