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433 IP
51
38.0
1G-100G Ethernet/FiberChannel/FlexO Core
The 1G-100G Multi-channel Multi-rate Ethernet/FiberChannel/FlexO Core (OmegaCORE100G_ZX) core from Alphawave is a multi-rate Ethernet aggregator that ...
52
38.0
FlexE 2.1/2.0/1.1/1.0 SHIM Core
The Alphawave FlexE SHIM IP core (FlexE SHIM) is cutting edge solution to the Ethernet application. It integrates seamlessly with Alphawave s MC MAC C...
53
38.0
SONET/SDH: OC12/4xOC3|STM-4/4xSTM-1 Framer
The SONET/SDH OC12/4xOC3 & STM-4/4xSTM-1 Framer core implements the STS-12/4xSTS-3 and STM-4/4xSTM-1 layer function of Telcordia GR-253-CORE/ITU-T G....
54
38.0
SONET/SDH: OC192/STM-64 Framer
The SONET/SDH Concatenated/Non-concatenated STS-192/STM-64 core implements the STS-192 and STM-64 layer function of Telcordia GR-253-CORE/ITU-T G.707,...
55
38.0
SONET/SDH: OC48/STM-16 Framer
The SONET/SDH Concatenated/Non-concatenated STS-48/STM-16 core implements the STS-48 and STM-16 layer function of Telcordia GR-253-CORE/ITU-T G.707, s...
56
38.0
QSGMII/SGMII/1000BASE-X and MAC
The fully integrated 5G QSGMII, 2.5G/1.25G SGMII and 1000BASE-X Physical Coding Sublayer (PCS-X) and Media Access Controller (MAC) core for Ethernet a...
57
38.0
Sub-2.5G GMP Mapper
Alphawave offers a low-area and low-power Sub-2.5G GMP (generic mapping procedure) mapper for low data rate application specified by the ITU-T G.709. ...
58
38.0
Sub-2.5G: GFP Mapper
The Alphawave 2.5G and lower rate (aka Sub-2.5G) GFP-F IP block performs G.7041 GFP processing on packet data at rates up to 2.5G/s. Typical applicati...
59
35.0
5G LDPC Encoder / Decoder
TC5200 is an efficient LDPC encoder/decoder Core solution fully compliant with 3GPP NR (5G) specifications. The Core is fully validated and has been s...
60
35.0
5G Polar encoder/decoder
TC5300 is an efficient Polar encoder/decoder Core solution compliant with 3GPP NR (5G) specifications. The Core is fully validated and has been select...
61
33.0
Low-Latency IP 10G Ethernet MAC
LeWiz makes available its ultra low-latency 10G Ethernet MAC for IP licensing - targeting low-latency applications such as those in the financial sect...
62
30.0
1.6T Ethernet UMAC
CoMira’s 1.6T Ethernet UMAC IP is designed to fulfill the MAC, PCS, and FEC requirements outlined in the IEEE 802.3-2022, IEEE 802.3ck, IEEE 802.3df, ...
63
30.0
TCP/IP - 10/25/40/100G Ethernet TCP Offload Engine
Chevin Technology’s TCP/IP Offload Engine is an FPGA Synthesisable Ethernet TCP/IP server/client in a lean and fast, all-RTL solution. Chevin Technolo...
64
30.0
UDP/IP - 10/25/40/100G Ethernet UDP/IP Offload Engine
Chevin Technology’s 10/25/40/100G UDP/IP Offload Engine for FPGAs has low latency and bandwidth overhead, as it sends packets of data without confirm...
65
30.0
LDPC Encoder / Decoder
Nand Flash write cycles are limited. An ECC detects and corrects failed operations, increasing the lifetime of the Nand Flash memory. For Nand Flash-b...
66
30.0
LTE turbo decoder
TC7000-LTE is a convolutional turbo code (CTC) decoder optimized for FPGAs. Its unique pipe-line architecture enables to reach very high clock frequen...
67
30.0
Multi-channel, multi-speed Ethernet universal media access control (MAC) and physical coding sublayer IP (UMAC)
CoMira’s multi-channel, multi-speed Ethernet universal media access control (MAC) and physical coding sublayer IP (UMAC) is fully configurable and pro...
68
25.0
LDPC Encoder / Decoder for 3GPP 5G NR
Our LDPC encoding and decoding IP for the 3GPP New Radio uplink and downlink data channel includes the entire processing chain, to provide quick and e...
69
25.0
1G/10G TCP/IP Hardware Stack
The TCPIP-1G/10G core implements a complete TCP/IP Hardware Protocol Stack. More capable than many offloading engines, it allows systems to connect to...
70
25.0
Polar Encoder / Decoder for 3GPP 5G NR
Our patented polar encoding and decoding IP for the 3GPP New Radio uplink and downlink includes the entire processing chain, to provide quick and easy...
71
25.0
TSN Ethernet Endpoint Controller
The TSN-EP implements a configurable controller meant to ease the implementation of endpoints for networks complying to the Time Sensitive Networking ...
72
25.0
TSN Ethernet Switch
The TSN-SW implements a highly flexible, low-latency TSN Ethernet switch. It supports Ethernet bridging according to the IEEE 802.1Q-2018 standard and...
73
25.0
Ethernet 10/100 PHY
The KA13ETHB33 is a single-port PHY with an MII (Media Independent Interface). It implements all 10/100M Ethernet Physical- layer functions including ...
74
24.0
Multi Protocol Endpoint IP Core for Safe and Secure Ethernet Network
"The CetraC EndSystem IP coreis the ideal solution to link your Avionic Computer System to a safe & secure embedded network as ARINC664p7, TSN or Safe...
75
24.0
Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
"The CetraC Switch IP core is the ideal solution to interconnect any Ethernet, TSN and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...
76
24.0
Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
"The CetraC Switch IP core is the ideal solution to interconnect any TSN, Ethernet and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...
77
20.0
10/25/40/100G Ethernet MAC
The Chevin Technology Ethernet MAC IP core can simplify the FPGA integration of Ultra low-latency 10/25/40/100G MAC Ethernet connectivity in Intel and...
78
20.0
10/25/40/100G Ethernet PCS/PMA
The Chevin Technology PCS/ PMA is an IP core that simplifies the FPGA integration of Ultra low-latency 10/25/40/100G Ethernet connectivity in Intel an...
79
20.0
10/25/40/100G MAC/PCS Ethernet IP Core
The 10/25/40/100G MAC IP core is a Low-Latency Ethernet MAC with a latency of 44.8ns in 2749 LUTs for 10Gbit/s and 20.5ns in 2680 LUTs for 25Gbit/s. W...
80
20.0
64G SerDes
The KNiulink 64G SerDes IP core supports PAM4 signaling in the range of 25.0 - 64.0 Gbps using full-rate and half-rate modes with scrambled data. Non-...
81
20.0
BCH Encoder / Decoder
The IP-Maker BCH Encoder/Decoder is full featured, easy to use into FPGA and SoC designs. To be easily integrated with the system interface, the IP co...
82
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
83
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
84
20.0
Gigabit Ethernet PHY
Gigabit Ethernet PHY...
85
20.0
Ethernet Enterprise Switch/Router IP Core - Efficient and Massively Customizable
Packet Architects offers a series of high speed switching/routing IP cores developed using the unique FlexSwitch tool-chain. This allows us to provide...
86
20.0
Ethernet IPSec/MACSec Switch/Router IP Core - Efficient and Massively Customizable
Packet Architects offers a series of high speed switching/routing IP cores developed using the unique FlexSwitch tool-chain. This allows us to provide...
87
20.0
DVB-S2 LDPC BCH Decoder and Encoder IP Core
The DVB-S2 LDPC-BCH block is a powerful FEC (Forward Error Correction) subsystem for Digital Video Broadcasting via Satellite....
88
20.0
DVB-S2 LDPC Decoder IP
In Digital video broadcasting for digital transmission for satellite applications, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Dens...
89
20.0
DVB-S2X LDPC BCH Decoder and Encoder IP Core
The DVB-S2X LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2 design fo...
90
16.0
8b/10 Decoder
The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium. It ensures enough state tr...
91
15.0
IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core
The PTP Ordinary Clock (OC) from NetTimeLogic is an extension to a single port of NetTimeLogic's PTP Transparent Clock (TC). It adds the Sync and Anno...
92
15.0
IEEE1588 & IEEE802.1AS PTP Transparent Clock (TC) core
The PTP Transparent Clock (TC) from NetTimeLogic is a fully scalable implementation of a Peer-To-Peer, One-Step Transparent Clock according to IEEE158...
93
15.0
Network Redundancy (HSR & PRP) core
The HSR&PRP Core from NetTimeLogic is a standalone Network Redundancy Core according to IEC62439-3 rev3. It allows to connect to a redundant network s...
94
15.0
Time Sensitive Networking (TSN) Single Port End Node core
The TSN End Node IP core from NetTimeLogic is a standalone Time Sensitive Networking (TSN) single port end node core according to IEEE 802.1 and IEEE ...
95
15.0
Time Sensitive Networking (TSN) Switched End Node core
The TSN Network Core (Switched End Node) from NetTimeLogic is a standalone Time Sensitive Networking (TSN) core according to IEEE 802.1, IEEE 1588 and...
96
15.0
DVB-S2X Wideband LDPC BCH Encoder IP Core
The DVB-S2X Wideband LDPC BCH Encoder IP Core is developed for Digital Video Broadcasting applications....
97
14.0
200G/400G High Speed Ethernet Controller MAC/PCS/FEC
200G/400G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hig...
98
14.0
400G/800G High Speed Ethernet Controller MAC/PCS/FEC
800G/400G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hig...
99
14.0
400G/800G High Speed Ethernet Controller PCS/FEC
Up to 800G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hi...
100
14.0
10G to 100G High Speed Ethernet Controller MAC/PCS/FEC
Up to 100G bandwidth solution for one Ethernet channel Cadence High Speed Ethernet Controller IP supports single channel Ethernet applications for hi...