Wireline Communication IP IP Core

The MESC_ST-5A function, implemented on a Cyclone II FPGA, is to extend the functionnality already available within the APC. This macro can be cust...

253

2.0

Enhanced Services Controller - Statistics Monitor

The MESC_ST3X function, implemented on a Virtex II FPGA, is to extend the functionnality already available within the APC. This macro can be custom...

254

2.0

SPI Master - EEPROM Controller

The MSPIM IP implements a synchronous a single-chip SPI Master IP capable of high speed serial data transfer with up to 8 SPI slave. The MSPIM IP can...

255

2.0

LTE Turbo decoder

This block is suitable for 3GPP Long Term Evolution (LTE) applications compatible with the 3GPP Technical Specification. The LTE Release-8 Turbo code ...

256

2.0

Ethernet MAC 10G SFP

The ETH_MAC_10G_SFP IP incorporates one Ethernet MAC at 10Gbits on a FPGA and is compliant with IEEE802.3ae specification. It is designed to be con...

257

2.0

ITU 25G PON LDPC Encoder and Decoder

The ITU-T G.9804.2 Recommendation defines the common transmission convergence (ComTC) layer for Higher Speed Passive Optical Networks. As part of the ...

258

2.0

DVB-GSE Encapsulator and Decapsulator

The DVB-GSE encapsulator and decapsulator IP cores close the gap between network protocols like Ethernet and the physical layer of the DVB family of s...

259

2.0

DVB-RCS Turbo Decoder

DVB-RCS (Digital Video Broadcasting - Interaction channel for satellite distribution systems) is an established ETSI standard for digital data transmi...

260

2.0

DVB-RCS2 Turbo Decoder

DVB-RCS2 (Digital Video Broadcast - Second Generation DVB Interactive Satellite System) is the latest ETSI standard of the second generation for digit...

261

1.0

10G/25G UDP/IP Hardware Protocol Stack

Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...

262

1.0

Packet-based Digital Radio Link

Fully custom Digital Radio Link based on either our FSK or PSK modulation schemes. Data is split into packets or frames and modulated for transmissio...

263

1.0

XAUI PHY

The Innosilicon XAUI PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the IEEE802.3 standard...

264

1.0

CCSDS 131.2 Wideband Demodulator

The Creonic CCSDS high performance wideband demodulator performs all tasks of an inner receiver. It allows for processing symbol rates of 500 Msymb/s ...

265

1.0

CCSDS 131.2 Wideband Modulator

The Creonic CCSDS high performance modulator performs all tasks of an inner transmitter. The modulator expects SCCC (Serial Concatenated Convolutional...

266

1.0

CCSDS 231.0 LDPC Encoder and Decoder

The CCSDS 231.0 LDPC IP supports the LDPC coding schemes as defined by the CCSDS standard. The LDPC codes with rate 1/2, coded block lengths 128 and 5...

267

1.0

CCSDS SCCC Turbo Encoder and Decoder

The recommended CCSDS 131.2-B-1 standard introduces a Serial Concatenated Convolutional Code (SCCC). Main goal of this code is to allow an efficient u...

268

1.0

CCSDS turbo decoder

TC6000 is a CCSDS turbo decoder....

269

1.0

UDP/IP Hardware Protocol Stack

Implements a UDP/IP hardware protocol stack that enables high-speed communication over a LAN or a point-to-point connection. Designed for standalone o...

270

1.0

LDPC Decoder for 802.11

This is an LDPC decoder compliant with the IEEE 802.11 n/ac/ax standards. It supports high throughput,...

271

1.0

LDPC Decoder for DVB-S2

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272

1.0

Medium throughput, compact Reed Solomon decoder

This implementation of a M=8 Reed Solomon decoder has been designed to use a minimum set of resources whilst maintaining a medium throughput and flexi...

273

1.0

5G-NR LDPC Decoder

5G NR is the mobile broadband standard of the 5th generation. A new rate compatible structure for LDPC codes are employed for channel coding to fulfil...

274

1.0

China Multimedia Mobile Broadcasting (CMMB) LDPC decoder

TC4300 is a LDPC decoder designed for China Multimedia Mobile Broadcasting (CMMB) specifications. The Core is a stand-alone module, with no external m...

275

1.0

Gigabit Ethernet MAC with AVB

The Arasan Gigabit Ethernet Media Access Controller IP is compliant with the Ethernet IEEE 802.3-2008 standard. In addition, the Gigabit Ethernet MAC...

276

1.0

Gigabit-range, low complexity LDPC decoder

TC4902 is ideally suited for applications requiring a very efficient throughput/area ratio, while not sacrificing SNR performance. TC4902 implements a...

277

1.0

High Performance Turbo Code

TC1600 is ideally suited for applications requiring small to medium block sizes in order to reduce latency and offer a high physical layer flexibility...

278

1.0

High Throughput QAM Demapper

This is a high throughput QAM constellation demapper and Log Likelihood Ratio (LLR) bit-metric generator. The core is capable of accepting a new equa...

279

1.0

High Throughput Reed Solomon Decoder

This is a Reed Solomon decoder capable of operating with shortened codewords. The basic mother rate is (N,K) = (255,239) which has 16 parity bytes an...

280

1.0

High-Speed Turbo Product Code decoder

TC3404 is a 2D TPC decoder that is optimised for high-speed. A single Core achieves in excess of 200 Mbps user rate with the latest FPGA families (Str...

281

1.0

High-throughput Low-memory Viterbi Decoder

This IP core is available in either normal or high throughput configurations. The normal configuration instances a single fully parallel stage, equiva...

282

1.0

Flexible LDPC encoder/decoder

TC5100 is a highly flexible LDPC encoder/decoder Core. It can essentially cover all possible quasi-cyclic LDPC codes: WiFi, WiMAX, proprietary codes, ...

283

1.0

Ultra Low-power, compact Hybrid Viterbi Decoder

This IP core is available with a configurable number of ACS units to suit a range of throughput requirements. The default configuration instances 4 AC...

284

1.0

Industry reference DVB-RCS turbo decoder

TC1000 implements the turbo code specified by DVB-RCS for Interactive 2-way satellite systems. This turbo code used offers a very high flexibility in ...

285

1.0

HomePlug Turbo Decoder

On the transmitter side, the PHY layer receives its inputs from the Media Access Control (MAC) layer. There are three separate processing chains: A) H...

286

1.0

Non-binary LDPC Decoder

A powerful Forward Error Correction (FEC) subsystem is needed in almost all wireless communication systems. Low-Density Parity-Check (LDPC) codes are ...

287

1.0

SPI Master Serial Interface Controller

Master serial interface compatible with the popular SPI standard. Features a simple command interface and permits multiple SPI slaves to be controll...

288

1.0

SPI Slave Serial Interface Controller

Slave serial interface compatible with the popular SPI standard. Permits an SPI Master to communicate with your FPGA, CPLD or ASIC device. The contr...

289

1.0

GPON FEC 2.5 Gbps

This high performance core is a full featured Forward Error Correction encoder and decoder, specially designed for high speed optical networks or any ...

290

1.0

AR4JA LDPC Decoder

AR4JA LDPC decoder is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3 and 3/4). To obtain hi...

291

1.0

LTE / HSPA turbo decoder

TC1700 is a FEC receiver adressing LTE, LTE-A, WiMAX, HSPA/+, and legacy 3G standard. It cover Rate matching , HARQ combining and turbo decoding. The...

292

1.0

LTE / WiFi Viterbi decoder

TC1720 is a high throughput and low latency Viterbi decoder optimized for WiFi and LTE applications. It covers optionally also WCDMA specifications....

293

1.0

ITU-Ghn LDPC Encoder / Decoder

TC4400 is a LDPC decoder core that is fully compliant with ITU G.hn (wireline home networking) specifications. It support a decoded throughput up to 1...

294

1.0

DVB-RCS2 Multi-Carrier Receiver

DVB-RCS2 (Digital Video Broadcast – Second Generation DVB Interactive Satellite System) is the latest ETSI standard of the second generation for digit...

295

1.0

DVB-RCS2 turbo decoder

TC1620 is a high performance turbo decdoer Core compliant with DVB-RCS2 specifications. Ideally suited fo systems requiring flexibility, short/medium ...

296

1.0

DVB-S2X Demodulator

The Creonic DVB-S2X demodulator is a low-complexity high-performance solution that allows for symbol rates of up to 100 MSymb/s on state-of-the-art FP...

297

1.0

DVB-S2X LDPC/BCH Decoder

DVB-S2X is the next generation satellite transmission standard that extends its well-established predecessor DVB-S2. The new specification allows for ...

298

1.0

DVB-S2X Modulator

The Creonic DVB-S2X high performance modulator performs all tasks of an inner transmitter. The modulator expects BBFrames after mode adaptati...

299

1.0

DVB-S2X Multi-Carrier Demodulator

The Creonic DVB-S2X high performance multi-carrier demodulator performs all tasks of an inner receiver while processing up to 36 carriers in parallel....

300

1.0

DVB-S2X Wideband Demodulator

The Creonic DVB-S2X high performance wideband demodulator performs all tasks of an inner receiver and achieves throughputs of up to 500 ...

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