Design & Reuse
420 IP
401
0.0
Ethernet 40G PCS IP
Ethernet 40G PCS core is compliant with IEEE Standard 802.3.2018 Ethernet specification. Through its Ethernet compatibility, it provides a simple inte...
402
0.0
ETHERNET 50G MAC IP
Ethernet 50G MAC core is compliant with IEEE Standard 802.3.2018 Ethernet specification. Through its Ethernet compatibility, it provides a simple inte...
403
0.0
Ethernet 50G PCS IP
Ethernet 50G MAC core is compliant with IEEE Standard 802.3.2018 Ethernet specification. Through its Ethernet compatibility, it provides a simple inte...
404
0.0
Ethernet Switch / Router IP Core - Efficient and Massively Customizable
Packet Architects offers a series of high speed switching/routing IP cores developed using the unique FlexSwitch tool-chain. This allows us to provide...
405
0.0
ETHERNET Switch IP
Ethernet Switch core is a full-featured, easy-to-use, synthesizable design that supports various Ethernet IEEE standards. Through its Ethernet compati...
406
0.0
Pulse Width Modulator
The PWM IP core implements a compact and highly flexible Pulse Width Modulator. The core generates a repeated pattern of pulse trains of run-time conf...
407
0.0
DVB-C Demodulator IP Core
The demodulator is designed to be used together with a cable tuner and an analog to digital converter (ADC). The system has an internal state machine ...
408
0.0
DVB-C2 LDPC Decoder IP
The Digital video broadcasting for cable systems systems, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes c...
409
0.0
DVB-C2 LDPC/ BCH Decoder IP Core
In Digital video broadcasting for cable systems systems, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Check) codes co...
410
0.0
DVB-S2-LDPC-BCH IP
The DVB-S2-LDPC-BCH block is a powerful FEC (Forward Error Correction) subsystem for Digital Video Broadcasting via Satellite. In Digital video broad...
411
0.0
DVB-S2X LDPC/BCH Decoder IP (Silicon Proven)
The DVB-S2/S LDPC/BCH decoder a silicon proven IP extracted from production chips has an octal input interface and a single output interface. The data...
412
0.0
DVB-S2X Modulator IP Core
IP core has two ways of forming the output spectrum: -Baseband (using odati and odatq), ifreq equal 0 -Intermediate frequency (using odati), ifreq not...
413
0.0
DVB-S2X NarrowBand Demodulator IP
This is NarrowBand demodulator IP is silicon proven and extratced from production chipsets, it performs demodulation according to DVB-S, legacy Direct...
414
0.0
DVB-S2X WideBand Demodulator IP
This is a high-performance, dual high-symbol-rate (HSR) DVB-S2/S2X demodulator IP extarcted from production chipsets with integrated tuner and silcon ...
415
0.0
DVB-S2X WideBand Demodulator & Decoder IP (Silicon Proven)
This is a high-performance, dual high-symbol-rate (HSR) DVB-S2/S2X demodulator IP extarcted from production chipsets with integrated tuner and silcon ...
416
0.0
DVB-S2X-LDPC Decoder IP
In Digital video broadcasting for digital transmission for satellite applications, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Dens...
417
0.0
DVB-T2-LDPC-BCH IP
In Digital video broadcasting for digital transmission for satellite applications, a powerful FEC (Forward Error Correction) sub-system is needed. FEC...
418
0.0
DVB-T2/Lite LDPC Decoder IP
In Digital video broadcasting for terrestrial broadcasting systems, a powerful FEC sub-system is needed. FEC is based on LDPC (Low-Density Parity Chec...
419
0.0
Express Serial Peripheral Interface IP Core
eSPI controller is full-featured, easy-to-use, synthesizable design, compatible with standard protocol of standard eSPI specification. Through its eSP...
420
0.0
Synopsys 112G Ethernet PHY IP for TSMC N6
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...