Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow 2D / 3D (30)
arrow Audio and Video (23)
arrow Audio and Video Platform (8)
arrow Audio Codec (98)
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arrow Image (72)
arrow Image Conversion (12)
arrow JPEG (48)
arrow Video Codec (155)
arrow Voice (13)
23 IP
1
50.0
Perceptual Video Quality Optimization IP
Today's media streaming market demands optimal quality video at the lowest possible data rate, as you need to enhance service users' viewing experienc...
2
50.0
VMAF Video Quality Metric Accelerator
Video encoding and delivery optimizations play a critical role in modern video streaming service market. Optimizations such as content-aware encoding ...
3
40.0
DL-based Video Super Resolution Hardware IP
Streaming video accounts for more than 80% of internet traffic, and over 90% of content is streamed in FHD or lower resolutions from a variety of serv...
4
10.0
MIPI D-PHY/sub-LVDS/CMOS1.8 combo Transmitter 2.5G/800Mbps 8-Lane
The CL12661M8T1KM2JIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System. The CL12661M8T1KM2JIP is designed to support...
5
6.0
DPI video output to system memory capture IP block
The Virtual Display IP is designed to enable automated testing of the output of display controllers with DPI-2 output interface such as the TES CDC (C...
6
1.0
AGC Control and data plane core
The eSi-AGC core provides the control and data plane interfaces to an AGC module. The signal processing in the core consists of a sliding energy est...
7
1.0
Digital Signal Processing IP-ZSPNano
ZSPNano is the perfect choice for Always ON applications involving sound detection, voice quality enhancement and command recognition. It is a tiny, e...
8
0.0
I2S Receiver/Transmitter
The logiI2S IP core from Xylon's logicBRICKS™IP library is a module for I2S audio data receiving and/or transmitting. The logiI2S IP's RX and TX submo...
9
0.0
AC'97 Audio Controller
The AC97-CTRL Audio Controller is a configurable IP block designed to simplify the integration of the AC'97 audio interface into ASIC and FPGA designs...
10
0.0
LCD Controller - TFT LCD Panels (AXI4 Bus)
The Digital Blocks DB9000AXI4 TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 4.0 AXI4 Protocol Interconne...
11
0.0
PDM2PCM PDM Receiver / PDM-to-PCM Converter
The PDM2PCM is a configurable audio interface core that converts a mono or stereo Pulse Density Modulation (PDM) stream into standard Pulse Code Modul...
12
0.0
Media Local Bus Interface
The logiMLB IP core from Xylon's logicBRICKS IP library supports implementation of the SMSC's Media Local Bus (MediaLB) inter-chip communication techn...
13
0.0
Fibre Channel AV (Audio Video) Core
The New Wave DV Fibre Channel Audio Video (FC-AV) core provides a complete hardware IP solution for the FC-AV protocol.The core provides full FC compl...
14
0.0
Video Sync Separator IP
The Digital Blocks DB1800 Video Sync Separator IP Core extracts timing information from a standard NTSC/PAL/SECAM composite sync video signal. The DB1...
15
0.0
High Dynamic Range (HDR) Pipeline
The logiHDR is an Ultra High Definition (UHD) HDR pipeline designed for digital processing and image quality enhancements of the raw image data from H...
16
0.0
Time Synchronization over Internet Protocol
The AIP-ST2059 is an FPGA IP core that generates timing and clock signals according to the SMPTE ST 2059 standard defined by the Society of Motion Pic...
17
0.0
MIPI Video Pipeline Solution
StreamDSP is proud to offer a complete MIPI video pipeline solution to help simplify the process of integrating video into any embedded FPGA system. ...
18
0.0
SMPTE ST 2110 Core
ST 2110 enables standards based media transport over IP for providing individual packetization of video, audio and metadata....
19
0.0
Low Power Arm AV Player
The Atria Logic AL-AVPLR-IPC is a compact and low power, embedded AVC (H.264) file-based AV decoder IP core, targeted for industrial and CE applicatio...
20
0.0
IP Suite for Premium Mobile Experiences
Over the last five years, we’ve seen CPU performance on smartphones increase an average of 20+ percent every year without compromising battery li...
21
0.0
Frame Rate Converter
TMC developed FRC ( Frame Rate Converter) software interfacing with YUV video format. FRC software generates new frames after decoding stream regardle...
22
0.0
CXP Device IP
SmartDV's CXP Device IP is a fully featured CoaXPress camera device solution purpose-built for SoC designs requiring high-speed, reliable machine visi...
23
0.0
CXP Host IP
SmartDV's CXP Host IP is a silicon-proven, fully featured CoaXPress host solution purpose-built for SoC designs requiring high-speed, reliable machine...