701 0.118

LVDS Transmitter IP, 700Mbps, UMC 55nm SP process 2.5V LVDS Transmitter 700Mbps, UMC 40nm LP Low-K Logic process....

702 0.118

LVDS Transmitter IP, 700Mbps, UMC 90nm SP process 3.3V LVDS Transmitter 700Mbps, UMC 55nm SP/RVT Low-K process....

703 0.118

LVDS Transmitter IP, 85MHz, UMC 55nm SP process 1.8V/3.3V 85MHz 35:5 LVDS Transmitter, UMC 0.18um GII Logic process....

704 0.118

Specialty OSC IO IP, BOAC (Bonding Over Active Circuit), UMC 40nm LP process UMC 40nm LP/RVT Logic process high frequency OSC BOAC IO....

705 0.118

Specialty OSC IO IP, 1MHz to 66MHz, UMC 55nm LP process UMC 55nm LP/RVT Logic process OSC High IO Library....

706 0.118

Specialty OSC IO IP, UMC 90nm LL process UMC 90nm LL/RVT process 2.5V high frequency OSC Pad....

707 0.118

Specialty OSC IO IP, UMC 90nm LL process UMC 90nm LL/RVT process 2.5V low frequency OSC Pad....

708 0.118

Specialty OSC IO IP, UMC 90nm SP process UMC 90nm SP/RVT process 2.5V low frequency OSC Pad....

709 0.3729

High Performance/Low Power/Ultra Low Power Via Programmable ROM Compiler with Row/Column Redundancy Option, supports process HP/HPC/HPC+/HPL/HPM/LP/ULP Specialty Memory Solutions...

710 0.118

Specialty OSC IO IP, 1MHz to 66MHz, UMC 90nm SP process UMC 90nm SP/RVT process 2.5V high frequency OSC Pad....

711 0.118

Specialty PCI IO IP, UMC 90nm SP process UMC 90nm Low-K SP process true 3.3V PCI-X IO cells Library for Intellon....

712 0.118

Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process UMC 0.13um HS/FSG SSTL2 (class 1) IO for BOAC....

713 0.118

Specialty SSTL IO IP, BOAC (Bonding Over Active Circuit), UMC 90nm SP process UMC 90nm SP/ Low-K Logic process SSTL2 (ClassI) BOAC IO Cells....

714 0.118

Specialty SSTL IO IP, UMC 0.13um HS/FSG process UMC 0.13um HS/FSG Logic process 2.5V/3.3V SSTL2-Class II/LVTTL combo IO with POC (Pad On Circuit)....

715 0.118

Standard Cell (ECO) Library IP, 6 tracks, UMC 0.11um eFlash process UMC 0.11um eFlash/EE2PROM AL process ECO_M1 Mini-Library+ (6-Track) Library....

716 0.118

Standard Cell (ECO) Library IP, UMC 0.11um SP/FSG process UMC 0.11um SP/FSG process mini-lib ECO_M1 Core Cell Library....

717 0.118

Standard Cell (ECO) Library IP, UMC 0.13um eHV process UMC 0.13um High-Voltage process ECO Cell Library with metal-1 start....

718 0.118

Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track ECO_M1 Cell Library (C35)....

719 0.118

Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic process 9-Track ECO_M1 Core Cell Library (C38)....

720 0.3729

Low Power/Ultra Low Power Ternary-CAM/Binary-CAM, supports process G/LP/LP_eDRAM/ULP/ULPEF Specialty Memory Solutions...

721 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track ECO Cell Library....

722 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track ECO Cell Library....

723 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library....

724 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/HVT process 12-Track ECO_M1 Cell Library (C35)....

725 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....

726 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track ECO_M1 Core Cell Library (C35)....

727 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....

728 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track ECO_M1 Cell Library (C35)....

729 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....

730 0.118

Standard Cell (ECO) Library IP, HVT, 9 tracks, UMC 40nm LP process UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (ECO_M1 Core)....

731 0.3729

Low Power/Ultra Low Power Dual Port SRAM Compiler with Row/Column Redundancy Option, with write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF Memory Compilers...

732 0.118

Standard Cell (ECO) Library IP, LVT, 9 tracks, UMC 40nm LP process UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (ECO_M1 Generic Core)....

733 0.118

Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 40nm LP process UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (ECO_M1 Core)....

734 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 40nm LP process UMC 40nm LP/HVT Low-K Logic process 7-Track ECO_M1 Cell Library....

735 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 40nm LP process UMC 40nm LP/LVT Low-K Logic process 7-Track ECO_M1 Cell Library....

736 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/HVT Logic process 12-Track high speed ECO_M1 Cell Library (C40)....

737 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/LVT Logic process 12-Track high speed Generic ECO_M1 Core Cell Library....

738 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/RVT Logic process 12-Track high speed ECO_M1 Cell Library (C40)....

739 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic process high performance 12-Track Metal1 Start ECO Core Cell Library....

740 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic process 7-Track ECO_M1 Cell Library....

741 0.118

Standard Cell (ECO) Library IP, HVT, 8 tracks, UMC 55nm LP process UMC 55nm LP/HVT Low-K Logic process 8-Track ECO Core Cell Library....

742 0.3729

Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, with read assist, write assist, supports process G/LP/LP_eDRAM/ULP/ULPEF Memory Compilers...

743 0.118

Standard Cell (ECO) Library IP, LVT, 8 tracks, UMC 55nm LP process UMC 55nm LP/LVT Low-K Logic process 8-Track ECO Core Cell Library....

744 0.118

Standard Cell (ECO) Library IP, RVT, 8 tracks, UMC 55nm LP process UMC 55nm LP/RVT Low-K Logic process 8-Track ECO Core Cell Library....

745 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 55nm LP process UMC 55nm LP/HVT Low-K Logic process 7-Track ECO Cell Library....

746 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 55nm LP process UMC 55nm LP/LVT Low-K Logic process 7-Track ECO Core Cell Library....

747 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 55nm LP process UMC 55nm LP/RVT Low-K Logic process 7-Track ECO Cell Library....

748 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 55nm LP process UMC 55nm LP/HVT Low-K Logic process 12-Track ECO Core Cell Library....

749 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 55nm LP process UMC 55nm LP/LVT Low-K Logic process 12-Track ECO Core Cell Library....

750 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 55nm LP process UMC 55nm LP/RVT Low-K Logic process 12-Track ECO Core Cell Library....