101 0.0

IPT 64GT/S UCIE-A PHY The UCIe-A_HS 64Gbps Die-to-Die (D2D) PHY IP is a cutting-edge solution designed to meet the growing demand for ultra-high-speed interconnects between...

102 0.0

IPT LOW POWER UCIE-A PHY The Ultra-low power UCIe-A Die-to-Die PHY IP is a cutting-edge solution designed to meet the growing demand for ultra-low-power system demand with up...

103 0.0

IPT 64GT/S UCIE-S PHY, The high-speed UCIe-S 64G is a cutting-edge standard package die-to-die (D2D) and chiplet-to-chiplet (C2C) interface IP solution designed to enable ul...

104 0.0

Network Interconnect IP The Network Interconnect (NIC) IP is a silicon proven and highly scalable on-chip communication fabric, enabling seamless connectivity between CPUs, G...

105 0.0

Ultra Accelerator Link（UALink) Controller Full-stack, scalable, configurable UALink Transaction Layer (TL), Data Link Layer (DL), and Physical Layer (PL), interconnect IP for next-generation A...

106 140.0

InfiniNoC Interconnect InfiniNoC is a scalable, modular Network-on-Chip (NoC) IP for many-core and chiplet-based system-on-chip (SoC) designs requiring high bandwidth, low l...

107 0.0

D2D (Die-to-Die) Interconnect IP in WhiteBox, Unlimited Usage This die-to-die interconnect IP Core is defined as an AIB IP Core, which is optimized for 32-bit AXI data transfer, enabling Master-to-Slave AXI trans...

108 0.0

Universal Chiplet Interconnect Express PHY IP GlobalFoundries® 22FDX® The Racyics UCIe PHY is an energy-efficient chiplet interconnect IP solution for consumer and automotive applications. Implemented in 22FDX technology...

109 0.0

UCIe Protocol Layer: AXI-S The AXI-S Protocol Layer for UCIe is a protocol adapter layer between a Streaming AXI Bus and the FDI interface of the UCIe D2D Adapter. It allows for...

110 8.5077

UCIe Controller for Standard Package UCIe v2.0 controller implements the D2D Adapter defined in the UCIe 2.0 specification, as well as AXI4-to-Flit protocol conversion. The D2D Adapter su...

111 0.0

eSPI Controller/Target RTL SystemVerilog IP Digital Blocks' DB-eSPI-Controller-Target-AMBA is a highly versatile, fully synthesizable SystemVerilog IP Core conforming to the eSPI 1.6 Specificati...

112 0.0

eSPI Controller RTL SystemVerilog IP Digital Blocks' DB-eSPI-Controller-AMBA is a fully synthesizable SystemVerilog IP Core conforming to the eSPI 1.6 Specification for Controller (Master...

113 0.0

eSPI Target RTL SystemVerilog IP Digital Blocks' DB-eSPI-Target-AMBA is a fully synthesizable SystemVerilog IP Core conforming to the eSPI 1.6 Specification for Target (Slave) applica...

114 0.0

45SPCLO UCIe-Class 1-32Gbps Low Power Transmitter IP (NRZ) The IKAIKA45GTX is the first generation of UCIe-Class transmitter macro on GF 45SPCLO technology node supporting from 1 to 32Gbps with 800mVpp single ...

115 0.0

45SPCLO UCIe-Class 1-32Gbps Low Power Receiver IP (NRZ) The IKAIKA45GRX is the first generation of UCIe-Class receiver macro on GF 45SPCLO technology node supporting from 1 to 32Gbps with 70mV sensitivity. ...

116 0.0

Synopsys UCIe Controller IP for Automotive Synopsys UCIe Controller IP is comprised of the Die-to-Die Adapter layer and Protocol layer for widely used protocols such as PCI Express and CXL. The...

117 0.0

UCIe 2.0 PHY for Standard Package (2nm) The UCI Express Specification Revision 3.0 supports high-speed serialization and deserialization at 4GT/s, 8GT/s, 12GT/s, 16GT/s, 24GT/s, 32GT/s, 48GT...

118 60.0

TSMC CLN6FF/7FF Die-to-Die Interface PHY IGAD2DX01A is a high speed die-to-die interface PHY which transmits data through INFO RDL channels. IGAD2DX01A contains 32 Tx lanes and 32 Rx lanes pe...

119 0.0

IPT D2D CONTROLLER The InPsytech high-speed D2D Controller IP, optimized for power and latency enables die-to-die or chiplet-to-chiplet connectivity in applications like...

120 0.0

D2D PHY, ADVANCED PACKAGE, 3nm The InPsytech (IPT) D2D PHY IP is a state-of-the-art physical layer interface designed to provide exceptional performance and efficiency in high-speed...

121 0.0

D2D PHY, ADVANCED PACKAGE, 5nm/4nm The InPsytech (IPT) D2D PHY is a mass-production proven, state-of-the-art physical layer interface designed to provide exceptional performance and eff...

122 0.0

D2D PHY, ADVANCED PACKAGE, 7nm/6nm The InPsytech (IPT) D2D PHY is a state-of-the-art physical layer interface designed to provide exceptional performance and efficiency in high-speed da...

123 0.0

D2D PHY, STANDARD PACKAGE, 7nm/6nm The InPsytech (IPT) D2D PHY is a state-of-the-art physical layer interface designed to provide exceptional performance and efficiency in high-speed da...

124 0.0

UCIE-A PHY, 5nm/4nm The InPsytech (IPT) UCIe-A PHY is a mass-production proven, state-of-the-art physical layer interface designed to provide exceptional performance and ...

125 0.0

UCIE-A PHY, ADVANCED PACKAGE The InPsytech (IPT) UCIe-A PHY is a state-of-the-art physical layer interface, offering industry-leading power efficiency and proven in mass productio...

126 0.0

IPT UCIE-S PHY The IPT UCIe-S is a cutting-edge standard package die-to-die (D2D) and chiplet-to-chiplet (C2C) interface IP solution designed to enable high-speed an...

127 0.0

XPHY Low power Chip to Chip SerDes IP, Silicon Proven in ST 28FDSOI These IPs are targeted at applications requiring high speed, high bandwidth, low-power consumption, and low-latency interfaces....

128 40.0

Non-coherent Network-on-chip (NoC) IP NC-NoC is a layered, scalable, physically aware configurable NoC supporting multiple clocking schemes for SoCs that do not require coherency. NC-NoC s...

129 30.0

Cloud-active NOC configuration tool for generating and simulating Coherent and Non-Coherent NoCs iNoCulator is a cloud-active EDA tool that is used to define the topology of a NoC quickly and easily, configure its parameters and simulate it to mea...

130 0.0

16G UCIe Advanced PHY for Intel UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

131 0.0

16G UCIe Advanced PHY for TSMC UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

132 0.0

16G UCIe Advanced PHY for TSMC UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

133 0.0

16G UCIe Standard PHY for Samsung UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

134 0.0

16G UCIe Standard PHY for TSMC UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

135 0.0

16G UCIe Standard PHY for TSMC Automotive UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

136 25.0

32G UCIe Advanced PHY for TSMC UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

137 15.0

32G UCIe Standard PHY for Samsung UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

138 15.0

32G UCIe Standard PHY for TSMC UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

139 0.0

40G Ultralink D2D PHY for GLOBALFOUNDRIES Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity. The Cadence® UltraLin...

140 0.0

40G Ultralink D2D PHY for Samsung Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity. The Cadence® UltraLin...

141 0.0

40G Ultralink D2D PHY for TSMC Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity. The Cadence® UltraLin...

142 75.0

64G UCIe Standard PHY for TSMC UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...

143 10.0

MAXVY Universal Chiplet Interconnect Express (UCIe) Verification IP MAXVY UCIe VIP , a state-of-the-art solution that offers a comprehensive set of features and capabilities to ensure the quality and performance of you...