1651 0.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (N4C) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1652 0.0

Synopsys 224G Ethernet PHY IP for TSMC N2P The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

1653 0.0

USB 3.0 Device Controller IP The Synopsys SuperSpeed USB IP solution is implemented in hundreds of designs and shipped in millions of units. The USB IP solution is based on the US...

1654 0.0

UDP/IP Hardware Protocol Stack - 50G The Digital Blocks DB-UDP-IP-50GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 50 GbE net...

1655 0.0

HDMI 2.0 RX 1P PHY 6Gbps in TSMC (28nm) The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

1656 0.0

HDMI 2.0 Transmitter (TX) IP Solutions The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...

1657 0.0

16G UCIe-SP PHY - GlobalFoundries 22FDX/22FDX+ EXTOLL’s high-speed UCIe PHY IP provides low-latency, high-bandwidth serial I/O capabilities for state-of-the-art Chiplet projects. The PHY comes as ...

1658 10.0

MAXVY MIPI D-PHY Receiver IP The MAXVY MIPI D-PHY Receiver IP is a robust high-speed PHY solution designed for receiving MIPI data streams in advanced imaging, display, automoti...

1659 10.0

MAXVY MIPI D-PHY Transmitter IP The MAXVY MIPI D-PHY Transmitter IP is a high-performance PHY solution designed for transmitting high speed data in modern display, camera, automotiv...

1660 20.0

MAXVY MIPI I3C MASTER (SDR) IP The Maxvy MIPI I3C Master (SDR) RTL IP is a lightweight, FPGA-validated controller compliant with the MIPI I3C public release specification, designe...

1661 20.0

MAXVY MIPI I3C TARGET IP MAXVY MIPI I3C Slave SDR RTL Design IP is a fully compliant I3C target interface solution enabling high bandwidth, low-pin-count sensor connectivity ...

1662 0.0

MAXVY MIPI DSI-2 RX Controller IP The MAXVY's MIPI DSI-2 RX Controller IP is a fully compliant receive solution designed to interface with MIPI DSI-2 transmitters and deliver display d...

1663 0.0

MAXVY MIPI CSI -2 TRANSMITTER IP -V3 MIPI CSI-2 (Camera Serial Interface) Transmitter IP defines an interface between a peripheral device (camera) and host processor (application engine) ...

1664 0.0

MAXVY MIPI SPMI HOST CONTROLLER The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-Chip (SoC) processor s...

1665 10.0

USB 3.0 PHY in UMC (65nm, 40nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1666 0.0

UDP/IP Hardware Protocol Stack - 40G The Digital Blocks DB-UDP-IP-40GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 50 GbE net...

1667 0.0

USB2.0 Full-Speed Transceiver The Renesas USB2.0 FS(Full-Speed) Transceiver is useful analog 1port transceiver hard macro for TSMC 22nm ULL process. This macro can be configured t...

1668 0.0

Synopsys MIPI M-PHY G5 for TSMC N5 The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

1669 6.0

AXI Expander IP The Truesilicon AXI Expander Block is a configurable IP designed for AXIbased systems where the data width of the Master Interface (MI) is smaller tha...

1670 6.0

AXI Splitter IP The AXI Splitter is a configurable IP designed to enable seamless data width conversion in AMBA AXI-based systems. It is primarily used when a wide da...

1671 6.0

AXI2APB Bridge IP The TrueSilicon's AXI to APB Bridge is a high-performance protocol converter IP designed to enable seamless communication between AXI master devices a...

1672 6.0

AXI2CHI Bridge IP The AXI2CHI bridge is a high-performance protocol converter that enables seamless integration between AXI (Advanced eXtensible Interface) and CHI (Coh...

1673 6.0

AXI2TileLink Bridge IP The AXI2TileLink Bridge is a high-performance, synthesizable IP designed to enable seamless interoperability between AMBA AXI-based subsystems and Til...

1674 6.0

CHI2AXI bridge IP The CHI2AXI bridge is a high-performance protocol converter designed to enable seamless interoperability between CHI (Coherent Hub Interface) and AXI ...

1675 6.0

TileLink2AXI Bridge IP The TileLink2AXI Bridge is a synthesizable, high-performance IP designed to provide seamless interoperability between TileLink-based components and AM...

1676 6.0

I2C Controller IP The TrueSilicon I2C Controller IP is a highly configurable and robust serial communication interface designed for seamless integration into modern Sys...

1677 0.0

UDP/IP Hardware Protocol Stack - 25G The Digital Blocks DB-UDP-IP-25GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 25 GbE net...

1678 0.0

OT9120 Simplified Integration Power Delivery Type-C Source IP This OT9120 is an easy to integrate and configure Type-C source port with Power Delivery. It is delivered as RTL and an Analog Front End hard macro. N...

1679 6.0

CAN Controller IP The TrueSilicon CAN Controller IP is a robust communication interface designed for system-on-chip (SoC) architectures, enabling reliable message-based...

1680 0.0

MIPI C-PHY/D-PHY Combo CSI-2 TX RX IP (3Gsps/3Gbps) on the TSMC N2 process The MXL-CDPHY-3G-CSI-2-TX-RX-T-N02 is a high-frequency, lowpower, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...

1681 0.0

OT9121 Simplified Integration Power Delivery Type-C Source IP This OT9121 is an easy to integrate and configure Type-C sink port with Power Delivery. It is delivered as RTL and an Analog Front End hard macro. No ...

1682 0.0

Synopsys UFS 4.0 G5 Host Controller with IE and Unipro The Synopsys Universal Flash Storage (UFS) Host Controller IP is a standardbased serial interface engine for implementing the JEDEC UFS interface in c...

1683 150.0

PHY for PCIe 7.0 for TSMC The Cadence PHY IP for PCI Express (PCIe) 7.0 delivers a data rate of up to 128Gbps in PAM4 mode. Designed specifically for Infrastructure and data ce...

1684 0.0

Synopsys MIPI C-PHY v1.2 / D-PHY v2.1 TX for TSMC N3P Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1685 0.0

MIPI A-PHY Tx-Rx IP The MIPI A-PHY Tx/Rx IP is a high-speed, silicon-proven physical layer solution designed for automotive camera, display, and sensor connectivity appli...

1686 140.0

DSP-Based 112G PAM4 SerDes PHY IP ForestSemi builds high-performance connectivity IP for the next generation of AI, HPC and data-center systems. With deep SerDes, PHY, and semiconducto...

1687 0.0

DSP-Based 56G PAM4 SerDes PHY IP ForestSemi builds high-performance connectivity IP for the next generation of AI, HPC and data-center systems. With deep SerDes, PHY, and semiconducto...

1688 0.0

UDP/IP Hardware Protocol Stack - 10G The Digital Blocks DB-UDP-IP-10GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 10 GbE net...

1689 0.0

MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP in TSMC 16FFC The MXL-CDPHY-CSI-2-RX+-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

1690 0.0

UDP/IP Hardware Protocol Stack - 1G The Digital Blocks DB-UDP-IP-1GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 10 GbE netw...

1691 2.0

I3C Master / Slave Controller - MIPI Basic v1.0 The Digital Blocks DB-I3C-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – BASIC ...

1692 0.0

Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Mem...

1693 3.0

I2C Slave with APB Master Bridge (I2C2APB) The DB-I2C-S-APB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...

1694 3.0

I2C Slave with AXI Master Bridge (I2C2AXI4) The DB-I2C-S-AXI-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...

1695 3.0

I2C Slave with AHB Master Bridge (I2C2AHB) The DB-I2C-S-AHB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...

1696 5.0

eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus) The Digital Blocks DB-eSPI-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI...

1697 10.0

USB-C 3.1/DP TX PHY in TSMC (16nm, 12nm, N7, N6) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1698 11.0

DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List The Digital Blocks DB-DMAC-MC2-DL-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memo...

1699 5.0

Scalable Ultra-High Throughput DSC 1.2b Encoder The UHT-DSC-E core is a scalable, ultra-high throughput, advanced DSC 1.2b encoder, compliant to the VESA Display Stream Compression (DSC) 1.2b standa...

1700 5.0

Scalable Ultra-High Throughput DSC 1.2b Decoder The UHT-DSC-D core is a scalable, ultra-high throughput, advanced DSC 1.2b decoder, compliant to the VESA Display Stream Compression (DSC) 1.2b standa...