351 0.118

USB 2.0 Device PHY IP, UMC 0.18um G2 process USB2.0 PHY (Pure device mode), UMC 0.18um GII Logic RVT/FSG process....

352 0.118

USB 2.0 Device PHY IP, UMC 0.18um G2 process USB2.0 Analog PHY, UMC 0.18um GII Logic RVT/FSG process....

353 0.118

USB 2.0 OTG PHY IP, UMC 0.13um HS/FSG process USB 2.0 On-The-Go PHY, UMC 0.13um HS/FSG Logic process....

354 0.118

USB 2.0 OTG PHY IP, UMC 0.18um G2 process USB 2.0 On-The-Go PHY, UMC 0.18um GII Logic RVT/FSG process....

355 0.118

USB 2.0 OTG PHY IP, UMC 0.25um process USB 2.0 host On-The-Go PHY, UMC 0.25um Logic process....

356 0.118

USB 2.0 OTG PHY IP, UMC 40nm LP process OTG USB2.0 UMC 40 nm LP/RVT process....

357 0.118

USB 2.0 OTG PHY IP, UMC 55nm eFlash process USB2.0 OTG PHY, UMC 55nm eFlash process....

358 7.0

USB 2.0 Full/Low-Speed Embedded Host Controller The FHG USB EHC is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 host functionality ...

359 0.118

USB 3.0 Device PHY IP, Non-Crystal mode support, UMC 40nm LP process Crystal-less USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process....

360 0.118

USB 3.0 OTG PHY IP, UMC 40nm LP process USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process....

361 0.118

MIPI M-PHY IP, UMC 40nm LP process MIPI MPHY 6Gbps/lane, UMC 40nm LP Low-K process....

362 0.118

USB 2.0 Device PHY IP, UMC 0.11um eFlash process UMC 0.11um eFlash Process , USB 2.0 OTG PHY...

363 0.118

USB 1.1 PHY IP, UMC 0.5um Logic process USB 1.1 PHY, UMC 0.5um Logic process 3.3V 1P3M....

364 0.118

MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process...

365 0.118

MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC+ Process MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC+ Process...

366 0.118

MIPI Receiver, DPHY V1.1 RX ; UMC 28nm HPC process MIPI Receiver, DPHY V1.1 RX ; UMC 28nm HPC process...

367 0.118

MIPI Receiver, DPHY V1.2 RX ; UMC 28nm HPC process MIPI Receiver, DPHY V1.2 RX ; UMC 28nm HPC process...

368 0.118

MIPI Receiver 80Mbps-1Gbps; 40nm LP LowK Logic Process MIPI Receiver 80Mbps-1Gbps; 40nm LP LowK Logic Process...

369 7.0

USB 2.0 High/Full-Speed Device Core The FHG USB2 DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high-/full-speed USB 2.0 device functiona...

370 0.118

MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process...

371 0.118

MIPI Receiver,DPHY RX V1.2; UMC 28nm HPC Logic and Mixed-Mode Process MIPI Receiver,DPHY RX V1.2; UMC 28nm HPC Logic and Mixed-Mode Process...

372 0.118

MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process...

373 0.118

MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process...

374 0.118

MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process...

375 0.118

MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC process MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC process...

376 0.118

MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC+ process MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC+ process...

377 0.118

MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process...

378 0.118

PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process. PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process....

379 0.118

UMC 28nm HPC+, 4-Lane 1.25~12.5 Gbps SERDES UMC 28nm HPC+, 4-Lane 1.25~12.5 Gbps SERDES...

380 7.0

USB 2.0 High/Full/Low-Speed Embedded Host Controller The FHG USB2 EHC is a scalable, high performance IP-module for usage in ASIC and FPGA designs to integrate high/full/low-speed USB 2.0 host functiona...

381 0.118

UMC 28nm HPC/Low-K process , 1.25G-16Gbps 4-Lane SERDES UMC 28nm HPC/Low-K process , 1.25G-16Gbps 4-Lane SERDES...

382 0.118

28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process 28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process...

383 0.118

USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process, without internal power clamping circuit USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process, without internal power clamping circuit...

384 0.118

USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic Low Power Low-K Process USB1.1 PHY Feature USB 1.1 On-The-Go PHY; UMC 55nm Logic Low Power Low-K Process...

385 0.118

USB 1.1 transceiver support crystal-less mode in USB system ; UMC 55nm eFlash Process USB 1.1 transceiver support crystal-less mode in USB system ; UMC 55nm eFlash Process...

386 0.118

USB 2.0 On-The-Go PHY, analog part ; UMC 28nm HPC RVT Logic Process USB 2.0 On-The-Go PHY, analog part ; UMC 28nm HPC RVT Logic Process...

387 0.118

USB2.0 OTG PHY UMC 40nm LP/RVT process, for Flip chip Bump type_LF USB2.0 OTG PHY UMC 40nm LP/RVT process, for Flip chip Bump type_LF...

388 0.118

USB 2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process USB 2.0 On-The-Go PHY; UMC 28nm HPC RVT Logic Process...

389 0.118

USB 2.0 On-The-Go PHY; UMC 28nm HPC+ RVT Logic Process USB 2.0 On-The-Go PHY; UMC 28nm HPC+ RVT Logic Process...

390 0.118

USB 2.0 On-The-Go PHY; UMC 40nm Logic LP/RVT Low-K Process USB 2.0 On-The-Go PHY; UMC 40nm Logic LP/RVT Low-K Process...

391 7.0

USB 2.0 OTG High/Full/Low-Speed Dual Role Core The FHG USB2 OTGDRD is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high/full/low-speed USB 2.0 device and ...

392 0.118

Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process. Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process....

393 0.118

USB 3.0 PHY; UMC 28nm HPC_Plus +RVT+LVT Logic Process USB 3.0 PHY; UMC 28nm HPC_Plus +RVT+LVT Logic Process...

394 0.118

USB 3.1 Gen.1 TYPE-C PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process USB 3.1 Gen.1 TYPE-C PHY ; UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT Process...

395 0.118

28nm HPC USB3.1 gen2 PHY(10Gbps) 28nm HPC USB3.1 gen2 PHY(10Gbps)...

396 0.118

28nm HPC+ USB3.1 gen2 PHY(10Gbps) 28nm HPC+ USB3.1 gen2 PHY(10Gbps)...

397 0.118

Analog part of 600Mbps to 4Gbps 8-lane V-By-One transmitter with embedded PLL circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process. Analog part of 600Mbps to 4Gbps 8-lane V-By-One transmitter with embedded PLL circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process....

398 0.118

PCIe Gen4 x8 Lane Endpoint Controller PCIe Gen4 x8 Lane Endpoint Controller...

399 0.118

V-by-One Receiver Analog part of 600Mbps to 4Gbps 4-lane V-By-One receiver with embedded CDR circuit, VCC=0.9V; UMC 28nm HPC+ LowK Logic Process....

400 0.118

MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process_x005F_x005F_x005F_x005F_x005F_x000D_ MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process...