Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5510 IP
51
200.0
UALink IP Solution with PHY, Controller and Verification IP
The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...
52
200.0
HBM4E Memory Controller
The Rambus HBM4E Controller Core is designed for use in applications requiring high memory throughput, low latency, and full programmability. The c...
53
200.0
CC-6xx CryptoManager Core
The Rambus CryptoManager Core CC-6xx is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-6xx. The CC-6xx products are designed...
54
200.0
CC-7xx CryptoManager Core
The automotive-grade Rambus CryptoManager Core CC-7xx family is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-7xx. The CC-7...
55
200.0
ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...
56
200.0
ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant
The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...
57
200.0
PCIe 7.0 Controller
The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...
58
200.0
GDDR7 Memory Controller
The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (...
59
200.0
CH-6xx CryptoManager Hub
The Rambus CryptoManager Hub CH-6xx is the next generation of flexible and configurable cryptographic family of accelerator cores. CH-6xx designs targ...
60
200.0
CH-7xx CryptoManager Hub
The automotive-grade CryptoManager Hub (CMH) from Rambus is the next-generation of flexible and configurable cryptographic family of accelerator cores...
61
200.0
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
62
200.0
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
63
200.0
MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
64
200.0
Compute Express Link (CXL) 3.1 Controller
The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6....
65
200.0
LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5
The Rambus LPDDR4 and LPDDR5 combo controller core is designed for use in applications requiring high memory throughput at low power including mobile,...
66
200.0
LPDDR5T / LPDDR5X / LPDDR5 Controller
The Rambus LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memory throughput ...
67
200.0
True Random Number Generator
The EIP-76 TRNG is an advanced hardware based, technology independent True Random Number Generator. Security is now a basic requirement for all device...
68
200.0
RT-6xx CryptoManager Root of Trust
The Rambus CryptoManager RT-6xx v3 Root of Trust (CMRT) family from is the latest generation of fully programmable FIPS 140-3 compliant hardware secur...
69
200.0
RT-7xx CryptoManager Root of Trust
The Rambus automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 complian...
70
195.0
PCIe 7.0 Retimer Controller
The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...
71
195.0
PCIe 7.0 Switch
The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enable...
72
190.0
PCIe 6.1 Controller
The Rambus PCI Express® (PCIe®) 6.1 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 5...
73
190.0
PCIe 6.2 Switch
The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...
74
190.0
Alphacore ASIC SoC Design Services
The Alphacore SoC ASIC design services and testing teams have extensive proven experience in delivering leading-edge turnkey low power, integrated cir...
75
180.0
HBM4 Memory Controller
The Rambus HBM4 Controller Core is designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced dat...
76
180.0
PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controlle...
77
180.0
GDDR6 Memory Controller
Rambus GDDR6 Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The ...
78
180.0
MIPI CSI-2 Controller Core V2
The Rambus CSI-2 Controller Core V2 is the second generation CSI-2 controller core. It is further optimized for high performance, low power and small ...
79
180.0
MIPI DSI-2 Controller Core
The Rambus DSI-2 Controller Core is the second generation DSI controller core. It is further optimized for high performance, low power and small size....
80
180.0
Quantum Safe Engine (QSE)
Quantum Safe Cryptography acceleration to protect data and devices in the quantum computing era...
81
180.0
Multi-Protocol Crypto Engine with Classification
The EIP-197 is a family of high speed Cryptographic Accelerators with embedded Classification Engine, Virtualization, Latency compensation to maintain...
82
180.0
Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
The Protocol-IP-196 Multi-Protocol Engine is a protocol-aware packet engine for accelerating IPSec, SSL/TLS, DTLS, 3GPP and MACsec up to 10 Gbps in mu...
83
170.0
PCIe 5.0 Customizable Embedded Multi-port Switch
Rambus PCIe 5.0 Multi-port Switch is a customizable, Embedded PCIe Switch designed for ASIC and FPGA implementations enabling the connection of one u...
84
160.0
HBM3E / HBM3 Memory Controller
The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. T...
85
160.0
PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Contr...
86
150.0
DDR5 MRDIMM for TSMC
Lowest latency and highest data rates for data-intensive applications Cadence Design IP solutions offer world-class DDR PHY and controller memory I...
87
150.0
PHY for PCIe 7.0 for TSMC
The Cadence PHY IP for PCI Express (PCIe) 7.0 delivers a data rate of up to 128Gbps in PAM4 mode. Designed specifically for Infrastructure and data ce...
88
150.0
High Bandwidth Memory (HBM4E) PHY for TSMC
Designed for performance and low latency in AI/ML, HPC, data center and graphics applications The High-Bandwidth Memory generation (HBM4/4E) PHY is...
89
150.0
UltraLink Controller
Ultralink controller for high performance die-to-die interconnect on streaming, CXS, and AXI protocols The Cadence Ultralink Controller enables a p...
90
150.0
Compute Express Link (CXL) 2.0 Controller
Rambus Compute Express Link (CXL) 2.0 Controller leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache a...
91
150.0
Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications
The pervasive nature of Ethernet has made it an integral part of our connected world, driving communication speeds up to 1.6T. To meet the quality, hi...
92
150.0
LPDDR6/5X Memory PHY for TSMC
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
93
150.0
eUSB2V2 PHY for TSMC
Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripheral...
94
150.0
Synopsys 1.6T Ethernet MAC IP
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
95
120.0
6-12-bit, Gen Analog-to-Digital Converter (ADC) IP block
Alphacore offers proven 6-12-bit analog to digital converters (ADC) intellectually property (IP) design blocks with the industry's best low-power and ...
96
120.0
4-16-bit, Gen Digital-to-Analog Converter (DAC) IP block
Alphacore offers proven 4-16-bit digital-to-analog converters (DAC) intellectually property (IP) design blocks with the industry's best low-power and ...
97
102.0
MIPI C-PHY/D-PHY Combo CSI-2 RX IP 4.5Gsps/4.5Gbps in TSMC N7
The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...
98
102.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps
The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
99
102.0
MIPI C-PHY/D-PHY Combo DSI TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CDPHY-4p5G-DSI-TX+-T-5N is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
100
102.0
Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...