151 21.0

Zero Additional Mask MTP IP, 2.2-5V 4kbit HHGrace 180BCD LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analo...

152 21.0

Embedded flash IP, 1.32V/3V PSMC 90nm LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cos...

153 21.0

Embedded flash IP, 1.5V/5V 130BCD Plus LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm . G1 is best fit embedded flash IP to BCD nodes and it can...

154 21.0

Embedded flash IP, 1.5V/5V 130nm LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cos...

155 20.0

13-bit, 80 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 65nm The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid-SAR ADC, with 13-bit ...

156 20.0

PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 5.0 IP suppo...

157 20.0

UCIe Verification IP Truechip's UCIe Verification IP provides an effective & efficient way to verify the UCIe components of an IP or SoC. Truechip's VIP is fully compliant...

158 20.0

2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load GV580 is a Gen 4 2D (vector graphics) GPU IP with 3D drawing functions. With further advanced architecture for minimized CPU load in 2D graphics proce...

159 20.0

2D (vector graphics) GPU IP Further advanced architecture for minimized CPU load and increased pixel performance in vector processing GV380S and GV380T are Gen 4 2D (vector graphics) GPU IPs. With further advanced Gen.4 architecture for minimized CPU load and increased pixel performa...

160 20.0

GDDR6 Memory Controller IP OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

161 20.0

Secure-IC's Securyzr™ Memory & Bus Protection IP Core The Memory & Bus Protection IP Core module enables on-the-fly encryption/decryption and authentication to the external memory. It supports AHB/AXI sl...

162 20.0

AES-XTS encryption/decryption IP SphinX is designed to accommodate the speed, latency and throughput requirements of high performance computer systems main memory / DRAM. The IP imple...

163 20.0

GF 6-bit, 10 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm The A6B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...

164 20.0

High-performance 2D (sprite graphics) GPU IP combining high pixel processing capacity and minimum gate count. GH310 is a GPU IP that packages the 2D Sprite engine available in the GSHARK-TAKUMI family IPs. This IP accelerates 2D graphics on embedded systems su...

165 20.0

High-Performance AES-GCM/CTR IP The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand...

166 20.0

High-Performance AES-XTS/ECB IP Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external data centers and the c...

167 20.0

MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and 55nm) MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pi...

168 20.0

MIPI UniPro IP for reliable, high-performance and low power link between devices in mobile devices Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

169 20.0

Image warping IP (distortion correction IP) Built on TAKUMI's GPU IP expertise, TAKUMI’s Image Warping IP lines up hardware acceleration IP products that support a variety of different image war...

170 20.0

Image warping IP (Distortion Correction IP) Integrating advanced on-the-fly coordinate transformation and image processing powered by GPU technologies - High-performance image warping IP (distor...

171 20.0

Image warping IP core The image warping IP core TW100 builds on TAKUMI's graphics accelerator IP core family as an additional solution to a variety of distortion correcting...

172 20.0

NoC Silicon IP for RISC-V based chips supporting the TileLink protocol Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...

173 20.0

NoC Silicon IP for RISC-V based chips supporting the TileLink protocol Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...

174 20.0

IP Prototyping Kits for USB, DDR, MIPI, PCI Express protocols The Synopsys IP Prototyping Kits, part of the IP Accelerated initiative, center around a complete, out-of-the-box reference design that consists of a ...

175 20.0

LPDDR4/3, DDR4/3 Memory Controller IP OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

176 20.0

LPDDR4x/4 PHY IP for 22nm OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

177 20.0

Pre-verified Interface IP Subsystems reduce design risk and accelerate time-to-market Customers are increasingly utilizing third-party standards-based IP in their designs, but face several challenges. With more IP and more complex inter...

178 20.0

Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk) KJN-S1 is able to get Higher performance lossless Compression by original algorithm. This product achieves a smaller circuit scale and higher compress...

179 20.0

USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5....

180 20.0

Multi Protocol Switch IP Core for Safe and Secure Ethernet Network "The CetraC Switch IP core is the ideal solution to interconnect any Ethernet, TSN and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...

181 20.0

Multi Protocol Switch IP Core for Safe and Secure Ethernet Network "The CetraC Switch IP core is the ideal solution to interconnect any TSN, Ethernet and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...

182 20.0

eUSB2V2.0 IP Arasan Chip Systems, the leading provider of IP for Mobile and Automobile SOC’s, presents its latest eUSB2 V2.0 IP. eUSB2 V2.0 is a new generation spe...

183 20.0

DVB-S2 LDPC BCH Decoder and Encoder IP Core The DVB-S2 LDPC-BCH block is a powerful FEC (Forward Error Correction) subsystem for Digital Video Broadcasting via Satellite....

184 20.0

DVB-S2X LDPC BCH Decoder and Encoder IP Core The DVB-S2X LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2 design fo...

185 20.0

Synopsys PCIe 4.0 PHY IP for TSMC N7 The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

186 18.0

Bluetooth® Bluetooth Low Energy 6.2 PHY IP The icyTRX-LE-22 is a compact, ultra-low-power Bluetooth® Low Energy 6.2 PHY IP core developed in 22nm CMOS technology. It is engineered for seamless ...

187 17.5

802.11ax STA mode IP This IP includes a recommendation-compliant 802.11ax PHY layer C floating-point code for the Station (STA) mode. The code is integrated into a simulat...

188 17.5

Wi Fi PHY TestBench IP This datasheet present s the verification e nvironment of Comsis IEEE 802.11n PHY IP, including a SystemVerilog test bench. This environment allows 2x...

189 15.0

High Bandwidth Memory 3 (HBM3/3E) IP optimized for Samsung SF4X SkyeChip’s HBM3 IP consists of a PHY and memory controller optimized for Samsung SF4X process to support the HBM3 memory standard (JESD238A) operating...

190 15.0

TSMC 13.1Gbps Multi-Protocol Low-Power SerDes IP It is a 4-lane Serializer/Deserializer IP supporting data rates from 500Mbps to 13.1Gbps. It features flexible architecture for multiple high-speed se...

191 15.0

TSMC 25Gbps SerDes IP with Equalizer This is a high-performance, multi-protocol serial transceiver IP that supports data rates from 1Gbps to 26Gbps. Built on TSMC 12nm technology, it is d...

192 15.0

DVB-S2X Wideband LDPC BCH Encoder IP Core The DVB-S2X Wideband LDPC BCH Encoder IP Core is developed for Digital Video Broadcasting applications....

193 14.0

10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications Configurable MAC solutions for speeds from 10Gbps to 10Mbps The Cadence 10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications is...

194 14.0

10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications Configurable MAC solutions for speeds from 10Gbps to 10Mbps The Cadence 10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications is...

195 14.0

10Gbps Multi-Link and Multi-Protocol PCIe 3.1 PHY IP for TSMC Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The Cadence® 10Gbps Multi-Link and Multi-Protocol PHY IP provides a flex...

196 14.0

10Gbps Multi-Protocol PHY IP Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The PHY IP is designed to deliver high eye-margin at low power for backp...

197 14.0

TicoXS FIP UHD4K Encoder / Decoder IP-core with JPEG XS and Flawless Imaging Profile (FIP) - – The newest codec for AV over IP with 100% quality and zero latency ! TicoXS FIP is the smart path to AV over IP. With low logic & low memory, it delivers together the interoperable JPEG XS lightweight low latency compre...

198 14.0

TicoXS FIP UHD8K Encoder / Decoder IP-core with JPEG XS and intoPIX Flawless Imaging Profile (FIP) – The newest codec for AV over IP with 100% quality and zero latency ! TicoXS FIP is the smart path to AV over IP. With low logic & low memory, it delivers together the interoperable JPEG XS lightweight low latency compre...

199 12.0

PCI Express PHY serial link PIPE Transceiver IP cell/hard macro SMS5000 is a fully integrated CMOS transceiver that handles the full Physical Layer PCI Express protocol and signaling. It contains all necessary AFE ...

200 12.0

Serial ATA (SATA) I/II PHY IP CORE SMS6000 is a Serial ATA gen I and gen II compliant PHY IP which supports SAPIS and Serial Attached SCCI (SAS) specifications both at 1.5 Gbp/s and 3.0...