1951 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/HVT process 12-Track ECO_M1 Cell Library (C35)....

1952 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....

1953 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/HVT Logic process 12-Track high speed ECO_M1 Cell Library (C40)....

1954 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/HVT Low-K Logic process high performance 12-Track Metal1 Start ECO Core Cell Library....

1955 0.118

Standard Cell (ECO) Library IP, HVT, 12 tracks, UMC 55nm LP process UMC 55nm LP/HVT Low-K Logic process 12-Track ECO Core Cell Library....

1956 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track ECO Cell Library....

1957 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track ECO_M1 Cell Library C35....

1958 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 40nm LP process UMC 40nm LP/HVT Low-K Logic process 7-Track ECO_M1 Cell Library....

1959 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 55nm LP process UMC 55nm LP/HVT Low-K Logic process 7-Track ECO Cell Library....

1960 0.118

Standard Cell (ECO) Library IP, HVT, 7 tracks, UMC 55nm SP process UMC 55nm SP/HVT Logic process 7-Track ECO_M1 Cell Library....

1961 0.118

Standard Cell (ECO) Library IP, HVT, 8 tracks, UMC 55nm LP process UMC 55nm LP/HVT Low-K Logic process 8-Track ECO Core Cell Library....

1962 0.118

Standard Cell (ECO) Library IP, HVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/HVT Logic process 9-Track ECO_M1 Core Cell Library....

1963 0.118

Standard Cell (ECO) Library IP, HVT, 9 tracks, UMC 40nm LP process UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (ECO_M1 Core)....

1964 0.118

Standard Cell (ECO) Library IP, HVT, UMC 40nm LP process UMC 40nm LP/HVT Low-K Logic process ECO_M1 Core Cell Library....

1965 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track ECO_M1 Core Cell Library (C35)....

1966 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....

1967 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/LVT Low-K Logic process high performance 12-Track Metal1 Start ECO Core Cell Library....

1968 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/LVT Logic process 12-Track high speed Generic ECO_M1 Core Cell Library....

1969 0.118

Standard Cell (ECO) Library IP, LVT, 12 tracks, UMC 55nm LP process UMC 55nm LP/LVT Low-K Logic process 12-Track ECO Core Cell Library....

1970 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track ECO Cell Library....

1971 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LMINUS (C30)....

1972 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track ECO Generic Core Cell Library wtih LPLUS (C38)....

1973 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track ECO_M1 Cell Library (C35)....

1974 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 40nm LP process UMC 40nm LP/LVT Low-K Logic process 7-Track ECO_M1 Cell Library....

1975 0.118

Standard Cell (ECO) Library IP, LVT, 7 tracks, UMC 55nm LP process UMC 55nm LP/LVT Low-K Logic process 7-Track ECO Core Cell Library....

1976 0.118

Standard Cell (ECO) Library IP, LVT, 8 tracks, UMC 55nm LP process UMC 55nm LP/LVT Low-K Logic process 8-Track ECO Core Cell Library....

1977 0.118

Standard Cell (ECO) Library IP, LVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/LVT Logic process 9-Track Standard Generic ECO Cell Library (C35)....

1978 0.118

Standard Cell (ECO) Library IP, LVT, 9 tracks, UMC 40nm LP process UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (ECO_M1 Generic Core)....

1979 0.118

Standard Cell (ECO) Library IP, LVT, UMC 40nm LP process UMC 40nm LP/LVT Low-K Logic process ECO_M1 Core Cell Library....

1980 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track ECO_M1 Cell Library (C35)....

1981 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic process 12-Track ECO_M1 Core Cell Library (C38)....

1982 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/RVT Logic process 12-Track high speed ECO_M1 Cell Library (C40)....

1983 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic process high performance 12-Track Metal1 Start ECO Core Cell Library....

1984 0.118

Standard Cell (ECO) Library IP, RVT, 12 tracks, UMC 55nm LP process UMC 55nm LP/RVT Low-K Logic process 12-Track ECO Core Cell Library....

1985 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library....

1986 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LMINUS (C30 RVT)....

1987 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track ECO Cell Library with LPLUS (C38)....

1988 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 28nm HPC process UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track ECO_M1 Cell Library (C35)....

1989 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic process 7-Track ECO_M1 Cell Library....

1990 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 55nm LP process UMC 55nm LP/RVT Low-K Logic process 7-Track ECO Cell Library....

1991 0.118

Standard Cell (ECO) Library IP, RVT, 7 tracks, UMC 55nm SP process UMC 55nm SP/RVT Logic process 7-Track ECO_M1 Cell Library....

1992 0.118

Standard Cell (ECO) Library IP, RVT, 8 tracks, UMC 55nm LP process UMC 55nm LP/RVT Low-K Logic process 8-Track ECO Core Cell Library....

1993 0.118

Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 28nm HLP process UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track ECO_M1 Cell Library (C35)....

1994 0.118

Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 28nm HLP process UMC 28nm HLP/RVT Logic process 9-Track ECO_M1 Core Cell Library (C38)....

1995 0.118

Standard Cell (ECO) Library IP, RVT, 9 tracks, UMC 40nm LP process UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (ECO_M1 Core)....

1996 0.118

Standard Cell (ECO) Library IP, RVT, UMC 40nm LP process UMC 40nm LP/RVT Low-K Logic process ECO_M1 Core Cell Library....

1997 0.118

Standard Cell (ECO) Library IP, RVT, UMC 55nm SP process UMC 55nm SP/RVT Low-K Logic process Mini-Library Metal1 Start ECO Core Cell Library....

1998 0.118

Standard Cell (ECO) Library IP, RVT, UMC 65nm SP process metal-1 start Gate Array ECO Library for UMC 65nm SP/RVT(FSE0A_D)....

1999 0.118

Standard Cell (ECO) Library IP, RVT, UMC 90nm SP process UMC 90nm SP/RVT Low-K Logic process ECO Cell Library....

2000 0.118

Standard Cell (ECO) Library IP, UMC 0.11um HS/FSG process UMC 0.11um HS/FSG Logic process Metal1 Start ECO Core Cell Library (for FSR0H_M)....