Design & Reuse
5423 IP
251
50.0
USB 3.1 PHY (10G/5G) inTSMC (16nm, 12nm, N7, N6, N5,N3E, N3P)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
252
50.0
USB-C 3.1 DP/TX PHY ebdaux in TSMC (N5, N4P, N4C, N3E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
253
50.0
USB-C 3.2 DP/TX PHY in TSMC (N3E)
The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...
254
50.0
USB-C 3.2 SS/SSP PHY in Type-C in TSMC (N7, N6, N5, N3E)
The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes con...
255
50.0
TSMC 3nm (N3E) 1.2V LVDS
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
256
50.0
TSMC 3nm (N3E) 1.2V/1.8V GPIO Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
257
50.0
TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
258
50.0
TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries, multiple metalstacks
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
259
50.0
TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...
260
50.0
TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...
261
50.0
TSMC 3nm (N3E) 1.5V LVDS
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
262
50.0
TSMC 3nm (N3E) 1.8V SD/eMMC IO
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
263
50.0
TSMC 3nm (N3E) 1.8V SD/eMMC PHY
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
264
50.0
TSMC 3nm (N3E) 1.8V SD/eMMC PHY, multiple metalstacks
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
265
50.0
TSMC 3nm (N3E) GPIO Basekit Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
266
50.0
Quad SPI Controller
The Serial Peripheral Interface or SPI-bus is a simple 4- wire serial communications interface used by many peripheral chips that enable the controlle...
267
50.0
Multi-protocol wireless plaform integrating 802.11ax (Wi-Fi 6), Bluetooth 5.4 Dual Mode, 802.15.4 (for Thread, Zigbee and Matter)
Ceva-Waves Links is a versatile family of multi-protocol wireless platform IPs, encompassing the latest consumer wireless standards. It leverages the ...
268
50.0
Turnkey eNB-IoT Release 15 & multi-constellation GNSS IP solution for IoT devices
Ceva has designed a complete eNB-IoT IP solution that can serve a wide range of applications. The Ceva-Waves Dragonfly NB2 pre-integrates together a C...
269
50.0
Hyperbus Flash Memory Controller
Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. At the same time, the pin-count requir...
270
46.0
32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 31 order, up to 32Gbps. Error count is accurate: no double counts or omissions reg...
271
46.0
32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7 or 15 order, up to 32Gbps. Error count is accurate: no double counts or omission...
272
46.0
32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7, 15 or 31 order, up to 32Gbps. Error count is accurate: no double counts or omis...
273
40.0
RapidIO Controller with V4.1 Support
Mobiveil's RapidIO Controller solution (GRIO) is a highly flexible and configurable IP. The Mobiveil RapidIO Controller Solution can be used as a Host...
274
40.0
LDPC Decoder for 5G NR and Wireless
Mobiveil's 5G NR LDPC Decoder IP Core offers a robust solution for LDPC decoding, featuring a dedicated LDPC decoder block for optimal performance. It...
275
40.0
VESA DisplayPort DP 1.4a / eDP 1.4b RX PHY , MST
Silicon Library's VESA DP 1.4a / eDP 1.4b RX PHY IP supports 1.62Gbps , 2.7Gbps , 5.4Gbps and 8.1Gbps , depending on the technology node. This silico...
276
40.0
VESA DisplayPort DP 1.4a / eDP 1.4b TX PHY
Silicon Library's VESA DP 1.4 a/ eDP 1.4b TX PHY IP supports 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps, depending on the technology node. This silicon p...
277
40.0
Ceva-Waves 802.11be (Wi-Fi 7) 2x2 MAC & Modem AP
The Ceva-Waves Wi-Fi IP family offers a comprehensive suite of IPs and platforms for embedding Wi-Fi connectivity into SoCs/ASSPs addressing a broad r...
278
40.0
CFrame70, DSC compression, decompression IP
The Chips&Media’s CFrame70 is VESA DSC Hardware IP, designed to significantly reduce memory size, DRAM bandwidth and power. This ultra-small, highly ...
279
40.0
UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8
Arasan's Universal Flash Storage 3.0 (UFS 3.0) is a simple but high performance, serial interface primarily used in mobile systems, between host proce...
280
40.0
MIPI RFFE Master Controller IP Core v3.0
Mobile radio communication systems are complex multi-radio systems comprising several transceivers. Arasan supports the latest MIPI RFFE standard v3.0...
281
40.0
eMMC 5.1 Device Controller
Arasan's eMMC 5.1 Memory controller is compliant with the latest eMMC 5.1 specification released by JEDEC. The controller provides a peak bandwidth of...
282
40.0
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
283
40.0
LPDDR5X/5/4X/4 PHY for 16nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
284
40.0
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
285
40.0
CXL 2.0 Agilex FPGA Acclerator Card
Mobiveil’s CXL-Aglx Accelerator platform is a PCIe® Gen5 add-in card with latest Intel’s Agilex I series FPGA. It supports High-Performance Applicatio...
286
35.0
50G PON LDPC
Mobiveil’s 50G PON LDPC Encoder/Decoder offers industry-leading LDPC error correction in a low-power, small-footprint, high-reliability solution. LDPC...
287
35.0
xSPI Master IP | NOR IP
Arasan Chip Systems, the leading provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash Devices. This...
288
30.0
4-/8-bit mixed-precision NPU IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
289
30.0
8-bit, 10 GSPS Analog-to-Digital Converter (ADC) IP block GlobalFoundries 22nm
The A8B10G is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, ...
290
30.0
6-bit, 20 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm
The A6B20G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...
291
30.0
1.6T Ethernet UMAC
CoMira’s 1.6T Ethernet UMAC IP is designed to fulfill the MAC, PCS, and FEC requirements outlined in the IEEE 802.3-2022, IEEE 802.3ck, IEEE 802.3df, ...
292
30.0
12-bit, 200 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 28nm
The A12B200M is a low-power, analog to digital converter (ADC) intellectually property (IP) design block. It is a hybrid successive approximatio...
293
30.0
12-bit, 5 GSPS Digital-to-Analog Converter (DAC) IP block GlobalFoundries 22nm
The D12B5G is a low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block. It is a current-steering DAC that has a 1...
294
30.0
12-bit, 500 MSPS Digital-to-Analog Converter (DAC) IP block GlobalFoundries 55nm
The D12B500M is an ultra low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block. It is a current steering DAC that h...
295
30.0
12-bit, 9 GSPS High Performance Swift™ ADC in 16nm CMOS
The ODT-ADS-12B9G-16 is an ultra high-performance time-interleaved 12-bit 9GSPS ADC on 16nm CMOS process. This Swift™ ADC supports input bandwidth sig...
296
30.0
I3C Host Controller v1.2
The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard off...
297
30.0
RapidIO to AXI Bridge (RAB)
Mobiveil's RapidIO-AXI Bridge (RIO-AXI Bridge) is a highly flexible and configurable IP used along with Mobiveil native RapidIO Controller (GRIO) to p...
298
30.0
WAVE-N, Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
WAVE-N is a high-performance, video-specialized NPU IP designed to deliver real-time, deep learning-based image enhancement for edge devices. By utili...
299
30.0
UCIe Die-to-Die Chiplet Controller
Introducing OPENEDGES’ Universal Chiplet Interconnect Express (UCIe) Controller IP, OUC, designed to transform the semiconductor landscape with innova...
300
30.0
Media Access Control Security (MACSec)
Media Access Control Security (MACSec) is an IEEE standards-based protocol for securing communication among the trusted components of an 802.1 LAN. MA...