1151 10.0

USB 3.0 femtoPHY in GF (28nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1152 10.0

USB 3.0 femtoPHY in Samsung (14nm, 11nm, 10nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1153 10.0

USB 3.0 femtoPHY in SMIC (28nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1154 10.0

USB 3.0 femtoPHY in TSMC (28nm, 22nm, 16nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1155 10.0

USB 3.0 femtoPHY in UMC (28nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1156 10.0

USB 3.0 PHY in GF (65nm, 55nm, 40nm, 28nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1157 10.0

USB 3.0 PHY in Samsung (28nm, 14nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1158 10.0

USB 3.0 PHY in SMIC (110nm, 65nm, 40nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1159 10.0

USB 3.0 PHY in UMC (65nm, 40nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1160 10.0

USB 3.0 SSPHY in GF (22nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1161 10.0

USB 3.1 Controller IP The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1162 10.0

USB 3.1 PHY (10G/5G) in GF (22nm) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1163 10.0

USB 3.1 PHY (10G/5G) in Samsung (14nm, 11nm, 10nm, 8nm, SF5, SF5A, SF4E) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1164 10.0

USB 3.1/DisplayPort 1.3 Controller IP Solutions The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1165 10.0

USB 3.1/DisplayPort 1.4 IP Subsystem Solution The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1166 10.0

USB 3.2 Controller IP The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes con...

1167 10.0

USB-C 3.0 femtoPHY in Type-C in TSMC (28nm, 16nm, 12nm) The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1168 10.0

USB-C 3.1 SS/SSP PHY in Type-C in TSMC (16nm, 12nm, N7, N6, N5, N5A, N3A) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1169 10.0

USB-C 3.1/DP TX PHY in GF (22nm) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1170 10.0

USB-C 3.1/DP TX PHY in Samsung (14nm, 11nm, 5nm) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1171 10.0

USB-C 3.1/DP TX PHY in TSMC (16nm, 12nm, N7, N6) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

1172 10.0

USB-C 3.2 DP/TX PHY ebdaux in Samsung (SF4A) for Automotive The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

1173 10.0

USB-C 3.2 DP/TX PHY ebdaux in TSMC (N5, N4C) The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

1174 10.0

USB-C 3.2 DP/TX PHY in GF (12nm) The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

1175 10.0

USB-C 3.2 SS/SSP PHY in Type-C in Samsung (SF4X, SF4E, SF2) The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes con...

1176 10.0

SSCG PLL - TSMC CLN3E Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...

1177 10.0

SSCG PLL - TSMC CLN3P Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...

1178 10.0

TSMC CLN16FFCLL 16nm Clock Generator PLL - 800MHz-4000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1179 10.0

TSMC CLN28HPC 28nm Clock Generator PLL - 175MHz-875MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1180 10.0

TSMC CLN28HPC 28nm Clock Generator PLL - 350MHz-1750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1181 10.0

TSMC CLN28HPC 28nm Clock Generator PLL - 700MHz-3500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1182 10.0

TSMC CLN28HPC 28nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1183 10.0

TSMC CLN28HPC 28nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1184 10.0

TSMC CLN28HPC 28nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1185 10.0

TSMC CLN28HPC 28nm Deskew PLL - 175MHz-875MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1186 10.0

TSMC CLN28HPC 28nm Deskew PLL - 350MHz-1750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1187 10.0

TSMC CLN28HPC 28nm Deskew PLL - 700MHz-3500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1188 10.0

TSMC CLN28HPC 28nm General Purpose PLL - 350MHz-1750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1189 10.0

TSMC CLN28HPC 28nm Multi Phase DLL - 175MHz-875MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1190 10.0

TSMC CLN28HPC 28nm Multi Phase DLL - 350MHz-1750MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1191 10.0

TSMC CLN28HPC 28nm Multi Phase DLL - 700MHz-3500MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1192 10.0

TSMC CLN28HPC 28nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1193 10.0

TSMC CLN28HPC 28nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1194 10.0

TSMC CLN28HPC 28nm Spread Spectrum PLL - 600MHz-3000MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1195 10.0

DSP-enhanced ARC EMxD and HS4xD processors provide combined RISC + DSP processing for computation intensive applications Synopsys has a long history of working with DSP customers to meet the ever-increasing computation requirements, offering lowest power consumption for ...

1196 10.0

Xtal Oscillator - TSMC CLN3A High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...

1197 10.0

Xtal Oscillator - TSMC CLN4P High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...

1198 10.0

Multi-protocol, Low Power Serdes - TSMC 28 CLN28HPL Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...

1199 10.0

Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications The Synopsys Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be configured ...

1200 10.0

Bus Bridges Various bus types of protocols are available and employed in many applications, all of which require a bridge to operate safely and without loss of da...