551 21.0

Embedded flash IP, 1.5V/5V 130nm LEE Flash G1 (G1) is based on simple SONOS architecture and capable to scale down to 40nm and supports auto grade temperature and quality. G1 is cos...

552 20.0

PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 5.0 IP suppo...

553 20.0

UCIe Verification IP Truechip's UCIe Verification IP provides an effective & efficient way to verify the UCIe components of an IP or SoC. Truechip's VIP is fully compliant...

554 20.0

Secure-IC's Securyzr™ Memory & Bus Protection IP Core The Memory & Bus Protection IP Core module enables on-the-fly encryption/decryption and authentication to the external memory. It supports AHB/AXI sl...

555 20.0

AES-XTS encryption/decryption IP SphinX is designed to accommodate the speed, latency and throughput requirements of high performance computer systems main memory / DRAM. The IP imple...

556 20.0

GH310 - 2D GPU IP / 2D Sprite Engine GH310 is a 2D GPU IP that packages the 2D image rendering features available in the GSHARK-TAKUMI family IPs. This IP accelerates 2D graphics on embed...

557 20.0

TicoXS FIP Decoder IP core with JPEG XS and intoPIX Flawless Imaging Profile (FIP) – The newest codec for AV over IP with 100% quality and zero latency ! TicoXS FIP is the smart path to AV over IP. With low logic & low memory, it delivers together the interoperable JPEG XS lightweight low latency compre...

558 20.0

TicoXS FIP Encoder IP core with JPEG XS and intoPIX Flawless Imaging Profile (FIP) – The newest codec for AV over IP with 100% quality and zero latency ! TicoXS FIP is the smart path to AV over IP. With low logic & low memory, it delivers together the interoperable JPEG XS lightweight low latency compre...

559 20.0

MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and 55nm) MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pi...

560 20.0

Image warping IP (distortion correction IP) Built on TAKUMI's GPU IP expertise, TAKUMI’s Image Warping IP lines up hardware acceleration IP products that support a variety of different image war...

561 20.0

Image warping IP (Distortion Correction IP) Integrating advanced on-the-fly coordinate transformation and image processing powered by GPU technologies - High-performance image warping IP (distor...

562 20.0

Image warping IP core The image warping IP core TW100 builds on TAKUMI's graphics accelerator IP core family as an additional solution to a variety of distortion correcting...

563 20.0

NoC Silicon IP for RISC-V based chips supporting the TileLink protocol Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...

564 20.0

NoC Silicon IP for RISC-V based chips supporting the TileLink protocol Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...

565 20.0

Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk) KJN-S1 is able to get Higher performance lossless Compression by original algorithm. This product achieves a smaller circuit scale and higher compress...

566 20.0

USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5....

567 20.0

Multi Protocol Switch IP Core for Safe and Secure Ethernet Network "The CetraC Switch IP core is the ideal solution to interconnect any Ethernet, TSN and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...

568 20.0

Multi Protocol Switch IP Core for Safe and Secure Ethernet Network "The CetraC Switch IP core is the ideal solution to interconnect any TSN, Ethernet and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...

569 20.0

GV380S - 2D GPU IP (Vector graphics accelerator) GV380S is a Gen.4 2.5D / 2D (vector graphics) GPU IP. With further advanced Gen.4 architecture for ultra-minimized CPU load and increased pixel perfor...

570 20.0

GV380T - 2D GPU IP (Vector graphics accelerator) GV380T is a Gen.4 2.5D / 2D (vector graphics) GPU IP. With further advanced Gen.4 architecture for ultra-minimized CPU load and increased pixel perfor...

571 20.0

DVB-S2 LDPC BCH Decoder and Encoder IP Core The DVB-S2 LDPC-BCH block is a powerful FEC (Forward Error Correction) subsystem for Digital Video Broadcasting via Satellite....

572 20.0

DVB-S2X LDPC BCH Decoder and Encoder IP Core The DVB-S2X LDPC Decoder is a powerful FEC core decoder for Digital Video Broadcasting via Satellite. It implements extensions to the DVB-S2 design fo...

573 18.0

Bluetooth® Bluetooth Low Energy 6.2 PHY IP The icyTRX-LE-22 is a compact, ultra-low-power Bluetooth® Low Energy 6.2 PHY IP core developed in 22nm CMOS technology. It is engineered for seamless ...

574 17.5

802.11ax STA mode IP This IP includes a recommendation-compliant 802.11ax PHY layer C floating-point code for the Station (STA) mode. The code is integrated into a simulat...

575 17.5

Wi Fi PHY TestBench IP This datasheet present s the verification e nvironment of Comsis IEEE 802.11n PHY IP, including a SystemVerilog test bench. This environment allows 2x...

576 15.0

High Bandwidth Memory 3 (HBM3/3E) IP optimized for Samsung SF4X SkyeChip’s HBM3 IP consists of a PHY and memory controller optimized for Samsung SF4X process to support the HBM3 memory standard (JESD238A) operating...

577 15.0

KiviHash-SHA3 Secure Hash Algorithm (SHA-3) IP Core The KiviHash-SHA3 (secure hash algorithms) is a hardware accelerator for cryptographic hashing functions. It is an area efficient and high throughput ...

578 15.0

TSMC 13.1Gbps Multi-Protocol Low-Power SerDes IP It is a 4-lane Serializer/Deserializer IP supporting data rates from 500Mbps to 13.1Gbps. It features flexible architecture for multiple high-speed se...

579 15.0

TSMC 25Gbps SerDes IP with Equalizer This is a high-performance, multi-protocol serial transceiver IP that supports data rates from 1Gbps to 26Gbps. Built on TSMC 12nm technology, it is d...

580 15.0

DVB-S2X Wideband LDPC BCH Encoder IP Core The DVB-S2X Wideband LDPC BCH Encoder IP Core is developed for Digital Video Broadcasting applications....

581 14.0

KiviHash-SHA256 Secure Hash Algorithm (SHA) IP Core KiviHash-SHA-256 is an IP core implementing the SHA-256 cryptographic algorithm, an one-way hash function compliant to NIST’s FIPS 180-4 standard. It ...

582 12.0

PCI Express PHY serial link PIPE Transceiver IP cell/hard macro SMS5000 is a fully integrated CMOS transceiver that handles the full Physical Layer PCI Express protocol and signaling. It contains all necessary AFE ...

583 12.0

Serial ATA (SATA) I/II PHY IP CORE SMS6000 is a Serial ATA gen I and gen II compliant PHY IP which supports SAPIS and Serial Attached SCCI (SAS) specifications both at 1.5 Gbp/s and 3.0...

584 12.0

WiSUN Sub-GHz 433, 868, 915MHz Transceiver IP The ShortLink Sub-GHz Transceiver RF IP 'SL40LP_Sub1GHzTrx_2' is a complete mixed signal RF IP for the 433, 868 and 915MHz frequency bands. It is comp...

585 12.0

Sub-GHz 433MHz RF Transceiver IP The ShortLink Sub-GHz Transceiver RF IP 'SL150_433MHzTrx_1' is a complete mixed signal RF IP for the 433MHz frequency band. It offers a data rate of 1...

586 10.0

H.264 Compression Video Over IP - HD Encoder Subsystem This Video Over IP Subsystem integrates H.264 compression Transport Stream and RTP/UDP/IP encapsulation to enable the rapid development of complete vi...

587 10.0

H.264 Decompression Video Over IP – HD Decoder Subsystem This Video Over IP Subsystem integrates H.264 Decompression, Transport Stream and RTP/UDP/IP de-capsulation to enable the rapid development of complet...

588 10.0

64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...

589 10.0

64x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process The ATO00064X8XH180TG33NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...

590 10.0

256x8 Bits OTP (One-Time Programmable) IP, TSM- 22ULP 0.8V/1.8V process The AT256X8T22ULP6AA is organized as 256 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 22nm ULP CMOS...

591 10.0

768x39 Bits OTP (One-Time Programmable) IP, TSM- 55ULP 0.9V–1.2V / 2.5V Process The ATO0768X39TS055ULP4NA is organized as 768x39 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 55nm LP 1.2V/2....

592 10.0

16Kx33 Bits OTP (One-Time Programmable) IP, TSM- 40LP 1.1V/2.5V Process The ATO016KX33TS040LLP7ZA is organized as 16K-bits by 33 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ...

593 10.0

H8/300 CPU IP ( 8-bit CPU IP ) H8/300 is a high speed 8-bit CPU with an internal 16-bit architecture. H8/300 CPU IP is compatible with H8S CPU subsystem IP (H8S C200) on system, bus...

594 10.0

H8S CPU subsystem (H8S C200) IP H8S is a high speed 16-bit CPU with an internal 32-bit architecture, which is upward-compatible with H8/300 and H8/300H CPUs on an object level. This ...

595 10.0

H8SX CPU subsystem (H8SX C3000) IP H8SX is a high speed 32-bit CPU, which is upward-compatible with H8/300, H8/300H and H8S CPUs on an object level. This subsystem IP supports many and ...

596 10.0

Camera ISP IP (Competitive Performance) - ZELKOVA Zelkova is a comprehensive ISP IP that includes many functionalities for image processing applications. It is optimized for low light environment appl...

597 10.0

Camera ISP IP (High Performance) - METASEQUOIA METASEQUOIA is a comprehensive ISP IP that includes many functionalities for image processing. It is optimized for high resolution and low light envir...

598 10.0

PCI Express - Configurable PCI Express 4.0 IP The Renesas PCIe 4.0 Dual Mode Link Controller IP is compliant with the "PCI Express (PCIe) 4.0 Base Specification". This IP supports the major functi...

599 10.0

Secure-IC's Securyzr™ Inline Decrypter IP Core The Inline Decrypter IP Core enables on-the-fly execution of encrypted code from Flash. It is often used to protect the source code from decompiling o...

600 10.0

JESD204D - Succesfully Taped out, Silicon Agnostic IP core The JESD204D Controller IP is based on the recently released D revision of the JEDEC standard for Serial Interface for Data Converters. The JESD204D I...