Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5438 IP
751
10.0
16G PHY in TSMC (N7) for Automotive
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...
752
10.0
18-40 MHz Crystal Oscillator - TSMC CLN3A
High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...
753
10.0
18-40 MHz Crystal Oscillator - TSMC CLN4P
High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...
754
10.0
18-40 MHz Crystal Oscillator - TSMC CLN5
High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...
755
10.0
18-40 MHz Crystal Oscillator - TSMC CLN5A
High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...
756
10.0
18-40MHz Crystal Oscillator - TSMC CLN3E
High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...
757
10.0
18-40MHz Crystal Oscillator - TSMC CLN3P
High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...
758
10.0
18-40MHz Xtal Oscillator - TSMC CLN2P
High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...
759
10.0
38.4MHz Crystal Oscillator Pad-TSMC 28 HPC+
Analog Bits offers a wide variety of IO. This low power Oscillator is optimized for consumer applications...
760
10.0
28G LR Ethernet PHY in GF (12nm)
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...
761
10.0
28G LR Ethernet PHY in Samsung (8nm, SF5A)
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...
762
10.0
28G LR Ethernet PHY in TSMC (16nm, N7, N6)
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...
763
10.0
CAN Bus Controller with Message Filter (configurable)
CANmodule-IIx is a full functional CAN controller module that contains advanced message filtering, and receive-, and transmit buffers. It is designed ...
764
10.0
CAN Bus Controller with Message Filter (Mailbox concept)
CANmodule-IIIx is a full functional CAN controller module that supports the concept of mailboxes. It is compliant to the international CAN standard de...
765
10.0
CAN Bus Controller with Message Filter (Mailbox concept)
CANmodule-III is a full functional CAN controller module that supports the concept of mailboxes. It is compliant to the international CAN standard def...
766
10.0
Band Gap Voltage Generator - TSMC CLN3E
Analog Bits’ regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro. The output...
767
10.0
Bandgap - TSMC CLN3A
Analog Bits’ Integrated Bandgap macro comprehensively addresses typical SOC voltage reference needs in a fully integrated easy-to-use macro. The Integ...
768
10.0
Bandgap - TSMC CLN3P
Analog Bits’ Integrated Bandgap macro comprehensively addresses typical SOC voltage reference needs in a fully integrated easy-to-use macro. The Integ...
769
10.0
CAT Trip Sensor, TSMC N3
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...
770
10.0
CAT Trip Sensor, TSMC N3EP
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...
771
10.0
CAT Trip Sensor, TSMC N5
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...
772
10.0
CAT Trip Sensor, TSMC N6
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...
773
10.0
WAVE521, H.265, HEVC, H.264, AVC video encoder IP for 4K
WAVE521 is a 4K multi-format encoder IP to support both HEVC/H.265 and AVC/H.264 video formats. It is capable of encoding HEVC Main/Main 10/Main Sti...
774
10.0
WAVE521CL, H.265, HEVC, H.264, AVC video codec IP for 4K low-cost
WAVE521CL is a low-cost 4K codec IP to support HEVC/H.265 and AVC/H.264 video standards. The codec IP is capable of encoding 4K60fps@500MHz with HEV...
775
10.0
WAVE521L, H.265, HEVC, H.264, AVC video encoder IP for 4K low-cost
WAVE521L is a low-cost 4K encoder IP to support HEVC/H.265 and AVC/H.264 video standards. The IP core provides high-performance encode capability up t...
776
10.0
WAVE633LC, H.265, HEVC, H.264, AVC, video codec IP for 4K low-cost
WAVE633LC is a 4K multi-standard video codec IP that supports HEVC/H.265 and AVC/H.264 video codec standards. WAVE633LC targets Low Cost, so B-frame i...
777
10.0
HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard
Synopsys HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard. The controller interoperates wit...
778
10.0
HBM3 PHY IP at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
779
10.0
PCI Express GEN 3/4 Port SERDES PHY - Samsung 14LPP
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
780
10.0
PCI Express GEN 3/4 Port SERDES PHY - Samsung 7LPP
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY ...
781
10.0
PCI Express GEN 4/5 Port SERDES PHY - Samsung 8LPP
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY ...
782
10.0
PCI Express GEN-3/Display Port SERDES PHY - Samsung 28 28LPP
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
783
10.0
PCI Express GEN-3/SATA3 SERDES PHY - Samsung 28 28FDSOI
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
784
10.0
PCIe 4.0 LP PHY in TSMC (N7) for Automotive
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
785
10.0
PCIe 4/5 Refenece Clock PLL with SSCS - GLOBALFOUNDRIES 12LP+
Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY...
786
10.0
PCIe 5.0 PHY NCS in TSMC (N7, N6, N6C, N5, N3P)
The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...
787
10.0
PCIe Gen 4/5/6 Ref Clock SSCG PLL - TSMC CLN2P
Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...
788
10.0
PCIe Gen 4/5/6 Ref Clock SSCG PLL - TSMC CLN7FF
Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...
789
10.0
PCIe Gen4/5 Ref SSCG PLL - TSMC CLN3A
Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...
790
10.0
PCIe Gen4/5 Ref SSCG PLL - TSMC CLN3E
Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...
791
10.0
PCIe/HCSL Differential IO Buffer - TSMC 16FFC
Analog Bits offers a unique set of IP's that is used for various SERDES applications. This unique IP is used for sending source clocks to SERDES for P...
792
10.0
PCIe3 SSCG PLL - GLOBALFOUNDRIES 12LP
Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 ...
793
10.0
PCIe3 SSCG PLL - GLOBALFOUNDRIES 12LP+
Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 ...
794
10.0
PCIe3 SSCG PLL - TSMC 12FFC
Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY...
795
10.0
PCIe3 SSCG PLL - TSMC 16FFC
Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 ...
796
10.0
PCIe4 Ethernet SERDES PHY - TSMC N5
Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY...
797
10.0
PCIe5 Ref Clock SSCG PLL - TSMC 6FF
Analog Bits’ PCIe Gen 5 Ref Clock SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Ex...
798
10.0
SD 3.0 / SDIO 3.0 Combo Device Controller
The SD / SDIO 3.0 Combo Device IP Core is a high performance controller capable of interfacing with memory cards and I/O applications such as WLAN, Bl...
799
10.0
SD 4.0 Device Controller
The SD 4.0 Device IP core is used to implement SD cards connected to a Host processor over standard SD bus. The flexible architecture of SD Device IP ...
800
10.0
SD 4.1 SDIO 4.1 Host Controller IP
The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a highly integrated host controller IP solution that supports two key memory card I/O technologies:...