Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5550 IP
101
160.0
HBM3E / HBM3 Memory Controller
The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. T...
102
160.0
PCIe 4.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
Rambus PCIe 4.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The Rambus PCIe 4.0 Contr...
103
150.0
DDR5 MRDIMM for TSMC
Lowest latency and highest data rates for data-intensive applications Cadence Design IP solutions offer world-class DDR PHY and controller memory I...
104
150.0
PHY for PCIe 7.0 for TSMC
The Cadence PHY IP for PCI Express (PCIe) 7.0 delivers a data rate of up to 128Gbps in PAM4 mode. Designed specifically for Infrastructure and data ce...
105
150.0
High Bandwidth Memory (HBM4E) PHY for TSMC
Designed for performance and low latency in AI/ML, HPC, data center and graphics applications The High-Bandwidth Memory generation (HBM4/4E) PHY is...
106
150.0
UltraLink Controller
Ultralink controller for high performance die-to-die interconnect on streaming, CXS, and AXI protocols The Cadence Ultralink Controller enables a p...
107
150.0
Compute Express Link (CXL) 2.0 Controller
Rambus Compute Express Link (CXL) 2.0 Controller leverages a silicon-proven PCIe 5.0 controller architecture for the CXL.io path, and adds CXL.cache a...
108
150.0
Configurable Ethernet controllers, compliant with the IEEE and consortium specifications for a range of applications
The pervasive nature of Ethernet has made it an integral part of our connected world, driving communication speeds up to 1.6T. To meet the quality, hi...
109
150.0
LPDDR6/5X Memory PHY for TSMC
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
110
150.0
eUSB2V2 PHY for TSMC
Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripheral...
111
150.0
Synopsys 1.6T Ethernet MAC IP
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
112
120.0
6-12-bit, Gen Analog-to-Digital Converter (ADC) IP block
Alphacore offers proven 6-12-bit analog to digital converters (ADC) intellectually property (IP) design blocks with the industry's best low-power and ...
113
120.0
4-16-bit, Gen Digital-to-Analog Converter (DAC) IP block
Alphacore offers proven 4-16-bit digital-to-analog converters (DAC) intellectually property (IP) design blocks with the industry's best low-power and ...
114
102.0
MIPI C-PHY/D-PHY Combo CSI-2 RX IP 4.5Gsps/4.5Gbps in TSMC N7
The MXL-CDPHY-4p5G-CSI-2-RX-T-N7FF is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specific...
115
102.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 4.5Gsps/4.5Gbps
The MXL-CDPHY-4p5G-CSI-2-TX+-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
116
102.0
MIPI C-PHY/D-PHY Combo DSI TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The MXL-CDPHY-4p5G-DSI-TX+-T-5N is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
117
102.0
Automotive MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The AUTO-MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
118
102.0
Automotive MIPI C-PHY/D-PHY Combo TX+ IP 4.5Gsps/4.5Gbps in TSMC N5
The AUTO-MXL-CDPHY-DSI-TX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
119
100.0
1.6T Ethernet PCS IP
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
120
100.0
1.6T Ethernet PCS IP based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet PCS IP is based on the concepts of the evolving draft IEEE 802.3dj standard creating a flexible system solution for next ge...
121
100.0
200G and 400G Ethernet PCS IP
The Synopsys Ethernet 400G and 200G Physical Coding Sublayer (PCS) IP is compliant with the IEEE 802.3bs standard and provides a complete set of featu...
122
100.0
800G Ethernet PCS IP
The Synopsys 800G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the 400G IEEE 802.3bs standard, provides a complete set of features enabl...
123
100.0
100MHz-13.5GHz, Gen Phase-Locked Loop (PLL) IP block
Alphacore offers proven 100MHz to 13.5GHz Phase-Locked Loop (PLL) intellectually property (IP) design blocks with the industry's best core offerings w...
124
100.0
10G-100G MACsec Security Module for Ethernet
Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...
125
100.0
112G Ethernet PHY in TSMC (N7, N6, N5, N3P)
The Synopsys 112G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
126
100.0
224G Ethernet PHY in TSMC (N3P, N2P)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
127
100.0
224G-LR SerDes PHY for TSMC
224G-LR SerDes PHY enables 1.6T and 800G networks The ever-increasing bandwidth in high-performance computing (HPC) applications is driving the rap...
128
100.0
CAN FD Bus Controller
CAN FD Bus Controller IP is an extension of Classical CAN Bus IP that addresses the increasing need for higher data rates and larger payload sizes. It...
129
100.0
PCIe 5.0 Integrity and Data Encryption Security Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...
130
100.0
PCIe 6.0 Integrity and Data Encryption Security Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...
131
100.0
PCIe 6.0 PHY in Samsung (SF5A, SF4X, SF2)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
132
100.0
PCIe 6.0 PHY in TSMC (N6, N5, N4P, N4C, N3P, N3E)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interfac...
133
100.0
PCIe 7.0 PHY in TSMC (N5, N4P, N4C, N3P, N3C, N2P)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
134
100.0
PCIe 7.0 PHY IP supporting the latest features of the evolving PCIe 7.0 specification to enable 128 GT/s and up to x16 lane configurations
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
135
100.0
UCIe PHY & D2D Adapter
Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specifica...
136
100.0
UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
137
100.0
UCIe-S PHY for Standard Package (x16) in Samsung (SF5A, SF4X, SF2)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
138
100.0
UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and netw...
139
100.0
SD 4.1 / SDIO 4.0 / eMMC 5.1 Host Controller
Arasan Chip Systems’ eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and ...
140
100.0
Adaptive Clock Generation Module for DVFS and Droop Response
The Movellus™ Aeonic Generate AWM3 high-performance clock generation IP product is part of the Aeonic digital IP product family. Designed for Droop Mi...
141
100.0
HDCP 2.3 Embedded Security Modules on DisplayPort/USB Type-C
The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...
142
100.0
Aeonic Generate Digital PLL for multi-instance, core logic clocking
The Movellus™ high-performance Aeonic Generate Clock Generation Module (CGM) is a high-quality digital PLL that enables distributed clocking for per-c...
143
100.0
Ceva-Waves Bluetooth 6.0 Low Energy Baseband Controller / Link Layer, software and profiles
Ceva-Waves Bluetooth Low Energy IP is a comprehensive and flexible solution for integration into SoCs/ASSPs. It has been qualified for Bluetooth Core ...
144
100.0
1G-25G MACsec Security Module
Data security between Ethernet-connected devices is expanding due to multiple factors: exponential growth of data containing sensitive and private inf...
145
100.0
The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
The Synopsys 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet providing a simp...
146
100.0
MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan's MIPI C-PHY is designed and compliant with latest MIPI C-Phy Standards. The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited ch...
147
100.0
MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
The Arasan MIPI CSI-2 Receiver IP Core functions as a MIPI Camera Serial Interface Receiver, between a peripheral device (Camera module) and a host pr...
148
100.0
MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.2 improves throughput over a bandwidth limited channel, allowing more data without in...
149
100.0
MIPI D-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
Arasan delivers you MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete G...
150
100.0
MIPI DSI Receiver Controller v1.3
The Arasan DSI Device Controller IP is designed to provide MIPI compliant high speed serial connectivity for mobile display modules with Type 1 to 4 a...