1 100.0

Aeonic Generate Digital PLL for multi-instance, core logic clocking The Movellus™ high-performance Aeonic Generate Clock Generation Module (CGM) is a high-quality digital PLL that enables distributed clocking for per-c...

2 16.0

8b/10 Decoder The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium. It ensures enough state tr...

3 16.0

AHB-Lite APB4 Bridge The Roa Logic AHB-Lite APB4 Bridge is a fully parameterized soft IP interconnect bridge between the AMBA 3 AHB-Lite v1.0 and AMBA APB v2.0 bus protoco...

4 16.0

AHB-Lite General Purpose Memory Module The Roa Logic AHB-Lite Memory IP is a fully parameterized soft IP implementing on-chip memory for access by an AHB-Lite based Master. All signals defi...

5 16.0

AHB-Lite Multilayer Switch The Roa Logic AHB-Lite Multi-layer Interconnect is a fully parameterized High Performance, Low Latency Interconnect Fabric soft IP for AHB-Lite. It al...

6 16.0

AHB-Lite Timer The Roa Logic AHB-Lite Timer IP is a fully parameterized soft IP implementing a user-defined number of timers and functions as specified by the RISC-V...

7 16.0

RISC-V Compliant Platform Level Interrupt Controller Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of i...

8 16.0

RISC-V Compliant Platform Level Interrupt Controller Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of i...

9 16.0

RISC-V Processor - RV12 - 32/64 bit, Single Core CPU The RV12 is a highly configurable single-issue, single-core RV32I, RV64I compliant RISC CPU intended for the embedded market. The RV12 is a member of ...

10 16.0

APB4 General Purpose Input/Output Module The APB4 GPIO Core is fully parameterised core designed to provide a user-defined number of general purpose, bidirectional IO to a design. The IO a...

11 16.0

APB4 Multiplexer The AMBA APB v2.0 bus protocol – commonly referred to as APB4 – defines a low-cost interface that is optimized for minimal power consumption and redu...

12 12.0

90nm FTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

13 12.0

90nm OTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

14 12.0

130nm FTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

15 12.0

130nm OTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

16 12.0

65nm FTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

17 12.0

65nm OTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

18 12.0

55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process NSCore's TwinBit(TM) is the only embedded CMOS, multi-time programmable (MTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to ...

19 12.0

180nm FTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

20 12.0

180nm MTP Non Volatile Memory for Standard CMOS Logic Process NSCore's TwinBit(TM) is the only embedded CMOS, multi-time programmable (MTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to ...

21 12.0

180nm OTP Non Volatile Memory for Standard CMOS Logic Process NSCore's PermSRAM(R) is the only embedded CMOS, one time programmable (OTP), non-volatile RAM IP of its kind, utilizing the 'hot carrier effect' to tr...

22 10.0

64x8 Bits OTP (One-Time Programmable) IP, UM- 55nm ULP standard CMOS core logic Process The AT64X8U55ULP6AA is organized as a 64-word by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 55nm ULP standard ...

23 5.0

AGILEX 7 R-Tile NVME HOST IP Gen5 NVMe Host IP on AGILEX7 R-Tile It enables random access, sequential access, Read/Write access and multi-user access. To show these features, s...

24 5.0

Xilinx UltraScale Plus NVME Hhost IP The LDS NVME HOST ZUP IP is one of the most flexible NVME HOST IP in the market. It has been done for beginners and expert in NVMe to drive NVMe PC...

25 5.0

Kintex Ultra Scale Plus NVMe Host IP The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The LDS NVME HOST IP provides two interfaces : * On...

26 5.0

NOE SAN IP Enabling Remote-Attached Storage on FPGA-Based Embedded Systems over 10G/25G/50G/100G/200G/400GbE The NOE_SAN_IP adopts an open SAN protocol named AT...

27 5.0

Logic Design Solutions - Design Services Logic Design Solutions has a deep knowledge of FPGA & IP design. We have an expertise in fast designs and for over 20 years? experience in FPGA/PLD De...

28 5.0

Polarfire NVMe Host Recorder The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The register file interface simplify the manag...

29 5.0

Polarfire SoC NVMe Host The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The register file interface simplify the manag...

30 5.0

ARINC 429 IP The M429GEN IP implements a synchronous single-chip ARINC 429 Transmit and Receive Controller capable of linking one CPU to one or several ARINC 429 ...

31 5.0

Artix Ultra Scale Plus NVMe Host IP Gen4 The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. - The LDS NVME HOST IP provides two interfaces : o One C...

32 5.0

Ethernet MAC 10G SFP The ETH_MAC_10G_SFP IP incorporates one Ethernet MAC at 10Gbits on a FPGA and is compliant with IEEE802.3ae specification. It is designed to be con...

33 5.0

NVME Host IP The new NVME-HOST-IP of Logic Design Solutions enables now random access in addition to the existing sequential access and multi-user access. FAT32 fi...

34 5.0

EXFAT IP Soft Core for NVMe The EXFAT IP Soft Core for NVMe supports any disk size and enables to reach the same speed as in raw format. One directory is created for each recordi...

35 3.0

LDO linear regulator to supply logic and analog domains - up to 5.5 V input supply in TSMC 22ULL iLR-Victoria-OV-ref-1.8-5.5-1.8-3.3.05_TSMC_22_ULL is a LDO linear regulator in TSMC 22ULL to supply logic and analog domains - up to 5.5 V input supp...

36 3.0

Low-leakage LDO for logic and analog domains supply up to 5.5 Vin - High temperature (Grade 1, Tj=150°) in TSMC 40uLP iLR-Victoria-OV-LS-ref-2.7-5.5-0.55-3.3.03_TSMC_40_uLP is a Low-leakage LDO in TSMC 40uLP to supply logic and analog domains (up to 5.5V input supply)...

37 3.0

Low-leakage LDO for logic and analog domains supply up to 5.5 Vin - High temperature (Grade 1, Tj=150°) in TSMC 40uLPeF iLR-Victoria-OV-LS-ref-2.7-5.5-0.55-3.3.03_TSMC_40_uLPeF is a Low-leakage LDO in TSMC 40uLPeF to supply logic and analog domains (up to 5.5V input sup...

38 3.0

Low-leakage LDO to supply logic and analog domains (up to 3.63V input supply) in TSMC 22ULL iLR-Victoria-ref-1.62-3.63-1.8-2.5.03_TSMC_22_ULL is a Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (3.3V input supply)....

39 3.0

Low-leakage LDO to supply logic and analog domains (up to 5.5V input supply) in TSMC 40 ULP iLR-Victoria-OV-ref-2.7-5.5-0.55-3.3.04_TSMC_40_uLP is a Low-leakage LDO in TSMC 40uLP to supply logic and analog domains (up to 5.5V input supply) wi...

40 2.5

FAT32 IP Soft Core for NVMe FAT32 IP Soft Core for NVMe...

41 2.5

SATA 3 Host Controller on ARRIA V FPGA The LDS SATA 3 HOST AR5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Stratix IV GX FPGA. T...

42 2.5

SATA 3 Host Controller on ZYNQ The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS SATA 3 HOST...

43 2.5

SATA 3 HOST IP on ARRIA 10 FPGA The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL ARRIA 10 GX FPGA. The L...

44 2.5

SATA Device Controller on Kintex 7 The LDS SATA 3 DEVICE XK7 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 FPGA. The LDS SATA...

45 2.5

SATA HOST 3 ON KINTEX 7 Ultrascale The LDS SATA 3 HOST XK7U IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 Ultrascale speed grade 2 FPGA. The...

46 2.5

SATA HOST 3 ON VIRTEX 7 GTH ...

47 2.5

SATA Host 6G Controller on Kintex 7 The LDS SATA 3 HOST XK7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 speed grade 2 FPGA. The LDS SATA 3 ...

48 2.5

SATA Host on Xilinx Zynq Artix 7 The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS SATA 3 H...

49 2.5

LDS SATA RECORDER IP ON ARTIX 7 ...

50 2.5

LDS SATA RECORDER ON ZYNQ ...