Design & Reuse
1758 IP
101
3.0
14 Bit Sigma Delta AD Converter
Full-Scale Differential input from -320mV to +320mV Independent Conversion Output Rate 17.6kHz Active and Standby Quiescent current modes Programmable...
102
3.0
16 Bit Sigma Delta AD Converter
This macro-cell is a single-channel 16-bit oversampling ADC intended for digital audio bandwidth applications. Supplied with 1.2V, the analog and the ...
103
3.0
CAN Controller
The final ASIC (Phase 2) will be a compound system solution comprising of a power supply blocks 3.3V, 5V Regulator and the CAN ISO11898-5 physical la...
104
3.0
CAN Transceiver
The HSCAN IP is a high speed CAN Transceiver for automotive 12V applications. It is fully compliant to the ISO 11898-5 Specifications. Sleep mode and ...
105
3.0
Advanced Encryption Standard (AES) core
The AES / Rijndael core can handle input block sizes of 128, 192 or 256 bit. The Decoder needs the key and the cipher text as input. The start_de sign...
106
3.0
AHB2APB Bridge IP
Truechip's AHB2APB Bridge IP provides chip designers and architects, an efficient way to connect Different Bus Protocol based IPs with reduced latency...
107
3.0
3V3 CAN Transceiver
The TS_CAN_3V3_X8 is a 3.3V CAN transceiver which supports data rates up to 1Mbps and is compatible with ISO 11898-2 compliant CAN transceivers. It su...
108
2.5
FAT32 IP Soft Core for NVMe
FAT32 IP Soft Core for NVMe...
109
2.5
SATA 3 Host Controller on ARRIA V FPGA
The LDS SATA 3 HOST AR5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Stratix IV GX FPGA. T...
110
2.5
SATA 3 Host Controller on ZYNQ
The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS SATA 3 HOST...
111
2.5
SATA 3 HOST IP on ARRIA 10 FPGA
The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL ARRIA 10 GX FPGA. The L...
112
2.5
SATA Device Controller on Kintex 7
The LDS SATA 3 DEVICE XK7 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 FPGA. The LDS SATA...
113
2.5
SATA HOST 3 ON KINTEX 7 Ultrascale
The LDS SATA 3 HOST XK7U IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 Ultrascale speed grade 2 FPGA. The...
114
2.5
SATA HOST 3 ON VIRTEX 7 GTH
...
115
2.5
SATA Host 6G Controller on Kintex 7
The LDS SATA 3 HOST XK7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 speed grade 2 FPGA. The LDS SATA 3 ...
116
2.5
SATA Host on Xilinx Zynq Artix 7
The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS SATA 3 H...
117
2.5
LDS SATA RECORDER IP ON ARTIX 7
...
118
2.5
LDS SATA RECORDER ON ZYNQ
...
119
2.5
Xilinx Kintex 7 NVME HOST IP
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD....
120
2.5
Xilinx Ultra Scale NVME Host IP
The LDS NVME HOST K7U IP is one of the most flexible NVME HOST IP in the market. It has been done for beginners and expert in NVMe to drive NVMe PC...
121
2.5
Xilinx Ultra Scale Plus SATA HOST IP
The LDS_SATA3_HOST_GTHE4 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Ultra Scale Plus GTHE4 FPGA. The LDS_SATA3_...
122
2.5
Xilinx ZYNQ NVME HOST IP
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD....
123
2.5
Virtex 7 GTX SATA 3 Host Controller
The LDS SATA 3 HOST XV7X IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 7 GTX speed grade 2 FPGA. The LDS SA...
124
2.5
NVMe Host Recorder on Mini-ITX Zynq 7
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The register file interface simplify the manag...
125
2.5
NVME-HOST-IP VIRTEX 7
The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD....
126
2.5
ZYNQ SATA 3 AHCI Host Controller with Linux Driver
The LDS SATA 3 HOST AHCI XZ7 IP incorporates the AHCI registers model, the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed gr...
127
2.0
7 way DDR combo
The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and the ...
128
2.0
7 way DDR combo
The LPDDR2/3_DDR3/4 libraries contain the 7-way combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and the ...
129
2.0
1.2V GPIO
The 1.2V GPIO library provides a bidirectional I/O driver for Parallel Trace Interface applications. This cell is compliant with version 2.0 of the th...
130
2.0
1.2V GPIO library designed for the SVID three-line interface.
The 1.2V GPIO library provides an open-drain bi-directional I/O driver designed for the SVID three-line interface. It is compliant with the Intel SVID...
131
2.0
3.3V Fault Tolerant General Purpose I/O Inline Pad Set
The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant. These programmable, multi-voltage I/O’s give the sy...
132
2.0
3.3V Fault Tolerant General Purpose I/O Staggered Pad Set
The 3.3V GPIO FT library provides general purpose bidirectional I/O cells that are fault tolerant. These programmable, multi-voltage I/O’s give the sy...
133
2.0
3.3V General Purpose I/O Inline Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...
134
2.0
3.3V General Purpose I/O Staggered Pad Set
The 3.3V GPIO library provides general purpose bidirectional I/O cells. These programmable, multi-voltage I/O’s give the system designer the flexibili...
135
2.0
3.3V 100 MHz Oscillator I/O Pad Set
The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spa...
136
2.0
3.3V 100MHz Oscillator I/O Pad Set
The 3.3V 100MHz Oscillators library includes a programmable oscillator macro I/O cell. ▪ 100 MHz programmable oscillator These libraries are off...
137
2.0
3.3V 100MHz Oscillator IO Inline Pad Set
The 3.3V 100MHz Oscillators library provides a 100 MHz crystal oscillator macro I/O cell. An adapter cell is included to utilize this oscillator with ...
138
2.0
3.3V 100MHz Oscillator IO Staggered Pad Set
The 3.3V 100MHz Oscillators library provides a 100 MHz crystal oscillator macro I/O cell. An adapter cell is included to utilize this oscillator with ...
139
2.0
3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set
The Oscillator library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is provided...
140
2.0
3.3V 32 KHz RTC and Programmable 100MHz Oscillator I/O Pad Set
The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is offered a...
141
2.0
3.3V 32kHz Oscillator IO Inline Pad Set
The 3.3V 32kHz Oscillators library provides a 32kHz real time clock oscillator macro I/O cell. An adapter cell is included to utilize this oscillator ...
142
2.0
3.3V 32kHz Oscillator IO Staggered Pad Set
The 3.3V 32kHz Oscillators library provides a 32kHz real time clock oscillator macro I/O cell. An adapter cell is included to utilize this oscillator ...
143
2.0
3.3V 32kHz RTC, 50MHz Low Power Oscillator, and Programmable 100MHz Oscillator Pad Set
The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal. This library is offered a...
144
2.0
3.3V GPIO: Fault Tolerant
The 3.3V Fault-Tolerant General Purpose I/O libraries provide programmable, multi-voltage bidirectional I/O’s that give the system designer the flexib...
145
2.0
3.3V Power Support I/O Pad Set
The 3.3V Support: Power library provides a full complement of cells to support the assembly of a complete pad ring by abutment. It is supplied as a st...
146
2.0
3.3V Wide Ranging GPIO
The 3.3V General Purpose I/O libraries provide bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog pow...
147
2.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, analog I/O, and a full complement of I/O power, core power, and analog power cells al...
148
2.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of I/O power, core power, and analog power...
149
2.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and space...
150
2.0
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along with corner and spa...