201 50.0

LPDDR5X/5/4X PHY in TSMC (N5, N4P, N4C, N3E, N3P, N3A) The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...

202 50.0

LPDDR5X/5/4X/4 combo PHY at Samsung SF5A OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

203 50.0

Open RAN Platform for Base Station and Radio Industry’s First Comprehensive 5G Baseband Platform IP for 5G RAN ASICs and Open RAN Building on more than a decade of leadership in baseband IP solut...

204 50.0

USB 2.0 nanoPHY in SMIC (65nm) The Synopsys USB 2.0 nanoPHY provides designers with a complete Physical Layer (PHY) IP solution, designed for low-power mobile and consumer applicati...

205 50.0

USB 3.1 PHY (10G/5G) inTSMC (16nm, 12nm, N7, N6, N5,N3E, N3P) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

206 50.0

USB-C 3.1 DP/TX PHY ebdaux in TSMC (N5, N4P, N4C, N3E) The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...

207 50.0

USB-C 3.2 DP/TX PHY in TSMC (N3E) The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

208 50.0

USB-C 3.2 SS/SSP PHY in Type-C in TSMC (N7, N6, N5, N3E) The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes con...

209 50.0

TSMC 3nm (N3E) 1.2V LVDS Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

210 50.0

TSMC 3nm (N3E) 1.2V/1.8V GPIO Libraries Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

211 50.0

TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

212 50.0

TSMC 3nm (N3E) 1.2V/1.8V GPIO with 1.8V Failsafe Libraries, multiple metalstacks Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

213 50.0

TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...

214 50.0

TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...

215 50.0

TSMC 3nm (N3E) 1.5V LVDS Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

216 50.0

TSMC 3nm (N3E) 1.8V SD/eMMC IO Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

217 50.0

TSMC 3nm (N3E) 1.8V SD/eMMC PHY Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

218 50.0

TSMC 3nm (N3E) 1.8V SD/eMMC PHY, multiple metalstacks Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

219 50.0

TSMC 3nm (N3E) GPIO Basekit Libraries Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

220 50.0

Quad SPI Controller The Serial Peripheral Interface or SPI-bus is a simple 4- wire serial communications interface used by many peripheral chips that enable the controlle...

221 50.0

Multi-protocol wireless plaform integrating 802.11ax (Wi-Fi 6), Bluetooth 5.4 Dual Mode, 802.15.4 (for Thread, Zigbee and Matter) Ceva-Waves Links is a versatile family of multi-protocol wireless platform IPs, encompassing the latest consumer wireless standards. It leverages the ...

222 50.0

Turnkey eNB-IoT Release 15 & multi-constellation GNSS IP solution for IoT devices Ceva has designed a complete eNB-IoT IP solution that can serve a wide range of applications. The Ceva-Waves Dragonfly NB2 pre-integrates together a C...

223 50.0

Hyperbus Flash Memory Controller Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. At the same time, the pin-count requir...

224 46.0

32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 31 order, up to 32Gbps. Error count is accurate: no double counts or omissions reg...

225 46.0

32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7 or 15 order, up to 32Gbps. Error count is accurate: no double counts or omission...

226 46.0

32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7, 15 or 31 order, up to 32Gbps. Error count is accurate: no double counts or omis...

227 45.0

AES-GCM Authenticated Encrypt/Decrypt Core The AES-GCM encryption IP core implements Rijndael encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bi...

228 40.0

RapidIO Controller with V4.1 Support Mobiveil's RapidIO Controller solution (GRIO) is a highly flexible and configurable IP. The Mobiveil RapidIO Controller Solution can be used as a Host...

229 40.0

LDPC Decoder for 5G NR and Wireless Mobiveil's 5G NR LDPC Decoder IP Core offers a robust solution for LDPC decoding, featuring a dedicated LDPC decoder block for optimal performance. It...

230 40.0

Ceva-Waves 802.11be (Wi-Fi 7) 2x2 MAC & Modem AP The Ceva-Waves Wi-Fi IP family offers a comprehensive suite of IPs and platforms for embedding Wi-Fi connectivity into SoCs/ASSPs addressing a broad r...

231 40.0

UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8 Arasan's Universal Flash Storage 3.0 (UFS 3.0) is a simple but high performance, serial interface primarily used in mobile systems, between host proce...

232 40.0

MIPI RFFE Master Controller IP Core v3.0 Mobile radio communication systems are complex multi-radio systems comprising several transceivers. Arasan supports the latest MIPI RFFE standard v3.0...

233 40.0

eMMC 5.1 Device Controller Arasan's eMMC 5.1 Memory controller is compliant with the latest eMMC 5.1 specification released by JEDEC. The controller provides a peak bandwidth of...

234 40.0

DP/eDP1.4b RX PHY Silicon Library's eDP/DP1.4b RX PHY IP supports 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps, depending on the technology node. This silicon proven IP is a...

235 40.0

DP/eDP1.4b TX PHY Silicon Library's eDP/DP1.4b TX PHY IP supports 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps, depending on the technology node. This silicon proven IP is a...

236 40.0

LPDDR5/4x/4 combo PHY on 14nm, 12nm OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

237 40.0

LPDDR5X/5/4X/4 combo PHY at 7nm OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

238 35.0

xSPI Master IP | NOR IP Arasan Chip Systems, the leading provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash Devices. This...

239 33.0

General Purpose & Bridge DMA LeWiz provides a range of direct memory access controllers (DMA) and bus bridge IP cores. These are customizable to user’s SoC or design requirements....

240 33.0

Ultra Low-Latency IP PCI-express Framework LeWiz makes available its low-latency PCI-express framework for IP licensing - targeting low-latency applications such as those in the financial secto...

241 33.0

Low-Latency IP 10G Ethernet MAC LeWiz makes available its ultra low-latency 10G Ethernet MAC for IP licensing - targeting low-latency applications such as those in the financial sect...

242 30.0

8-bit, 10 GSPS Analog-to-Digital Converter (ADC) IP block GlobalFoundries 22nm The A8B10G is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, ...

243 30.0

6-bit, 20 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm The A6B20G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...

244 30.0

1.6T Ethernet UMAC CoMira’s 1.6T Ethernet UMAC IP is designed to fulfill the MAC, PCS, and FEC requirements outlined in the IEEE 802.3-2022, IEEE 802.3ck, IEEE 802.3df, ...

245 30.0

12-bit, 200 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 28nm The A12B200M is a low-power, analog to digital converter (ADC) intellectually property (IP) design block. It is a hybrid successive approximatio...

246 30.0

12-bit, 5 GSPS Digital-to-Analog Converter (DAC) IP block GlobalFoundries 22nm The D12B5G is a low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block. It is a current-steering DAC that has a 1...

247 30.0

12-bit, 500 MSPS Digital-to-Analog Converter (DAC) IP block GlobalFoundries 55nm The D12B500M is an ultra low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block. It is a current steering DAC that h...

248 30.0

12-bit, 9 GSPS High Performance Swift™ ADC in 16nm CMOS The ODT-ADS-12B9G-16 is an ultra high-performance time-interleaved 12-bit 9GSPS ADC on 16nm CMOS process. This Swift™ ADC supports input bandwidth sig...

249 30.0

I3C Host Controller v1.2 The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard off...

250 30.0

RapidIO to AXI Bridge (RAB) Mobiveil's RapidIO-AXI Bridge (RIO-AXI Bridge) is a highly flexible and configurable IP used along with Mobiveil native RapidIO Controller (GRIO) to p...