Design & Reuse
5347 IP
551
14.0
UltraLink Controller
Ultralink controller for high performance die-to-die interconnect on streaming, CXS, and AXI protocols The Cadence Ultralink Controller enables a pro...
552
14.0
Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Ultra-low latency UCIe controller for standard industry chiplet interoperability on streaming, PCIe, and CXL protocols The Cadence UCIe™ Controller i...
553
14.0
Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Ultra-low latency UCIe controller for standard industry chiplet interoperability on streaming, PCIe, and CXL protocols The Cadence UCIe™ Controller i...
554
14.0
Controller for MIPI Soundwire
Audio data transport The Cadence® IP Family for MIPI® Protocols delivers area-optimized interface IP with the low power and high performance required...
555
14.0
USB 2.0 Controller
Mature controller solution for OTG and Device applications Certified for compliance with Universal Serial Bus Specification, Revision 2.0, the Cadenc...
556
14.0
USB 2.0 PHY for TSMC
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory fo...
557
14.0
USB 3.0 xHCI Host Controller
Mature solutions featuring xHCI Host, Device, and Dual-Role Device Compliant with Universal Serial Bus 3.0 Specification, Revision 1.0 and xHCI Speci...
558
14.0
USB 3.1 Device Controller
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, th...
559
14.0
USXGMII Ethernet PCS (PCSR_X)
The Cadence USXGMII PCS (PCSR_X) IP provides the logic required to integrate a USXGMII, 5GBASE-R, or 10GBASE-R PCS into any system on chip (SoC). The...
560
14.0
Ethernet XAUI PCS
Integrates MAC IP to a broad range of PHY and SerDes IP The Cadence Ethernet XAUI Physical Coding Sublayer (PCS) IP provides the logic required to in...
561
14.0
Dual-Role Device Controller for USB 3.0
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.0 Specification v1.0, and xHCI Specification v1.0, th...
562
14.0
Dual-Role Device Controller for USB 3.1
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, th...
563
14.0
CXL Controller
Low-latency Controller IP for cache-coherent root-port, end-point, and dual-mode applications The Cadence® Controller IP for CXL provides the logic r...
564
13.0
AXI4 Multi-Channel DMA Controller (Configurable, typically up to 1024 DMA Channels)
The Digital Blocks DB-DMAC-MC-AMBA SystemVerilog RTL IP Core is a Scatter-Gather (SG) Direct Memory Access (DMA) Controller with Master AXI4 Interconn...
565
12.0
105dB PCM-to-PDM Stereo Converter
The AR37T01 is a digitally coded stereo PCM-to-PDM conversion IP with 8-bit pattern-code programming. The IP translates parallel PCM input data in...
566
12.0
12-bit, 8 GSPS DAC Ultra Low Power on 7nm
The ODT-DAC-12B8G-7nm is a high-performance current steering 12-bit DAC that operates at an update rate of up to 8GSPS. The DAC uses a proprietary arc...
567
12.0
14-bit, 1200 MSPS Ultra Low Power ADC in 28nm CMOS
The ODT-ADP-14B1P2G-28 is a low power high speed pipelined ADC designed in a 28nm standard CMOS process, implemented using Omni Design's groundbreakin...
568
12.0
Latch-Up Detector
The ODT-LUP-2I3O-7T-A1 is a latch-up detection solution that can support integration into advanced FinFET process nodes such as N7. The IP works in...
569
12.0
General Purpose Voltage Buffer
The ODT-OBF-ULP-DC-16FFCT is a voltage buffer with a high drive capability and is stable up to a 1nF output load. It can be used to daisy-chain volta...
570
12.0
AHB Multi-Channel DMA Controller
The Digital Blocks DB-DMAC-MC-AHB Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 1 – 16 independent data transfers. The Direct Memor...
571
12.0
Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO
The ODT-AFE-8A1P-16FFCT is a highly integrated AFE designed in a 16nm CMOS process. The AFE includes eight 9-bit, 1GSPS ADCs, multiple LDOs and refer...
572
12.0
Analog Front End: 8x 12-bit 2 GSPSADCs, 4x 12-bit 200 MSPS ADCs, TVM, PLL, LDO
The ODT-AFE-12A1P2T-16FFCT is an ultra high-performance AFE designed in a 16nm CMOS process. The AFE includes eight 12-bit, 2GSPS ADCs, four 12-bit 2...
573
12.0
Low Dropout (LDO) Capless Regulator - GF 22FDX
The ODT-LDO-IC-250M-GF22FDX is a low dropout (LDO), linear regulator for integration in a SoC. The LDO uses advanced control techniques to achieve exc...
574
11.0
12-bit, 5 MSPS ADC with 8:1 Input Mux in 6nm CMOS
The ODT-ADS-12B5M-6 is an ultra low-power ADC designed in a 6nm process. This 12-bit, 5MSPS ADC supports input signals up to 1 MHz and features 1.8V s...
575
11.0
12bit, 400 MSPS ADC Ultra Low Power
The ODT-ADS-12B400M-7T is an ultra low power ADC designed in a 7nm CMOS process. This 12-bit, 400MSPS ADC supports input signals up to 200MHz and fea...
576
11.0
I2S/Left-Justified/TDM Digital Audio Interface
The AR38U12 is a soft macro IP supporting industry-standard I2S, Left-Justified and Time-Division-Multiplexed (TDM) serial interface to parallel PCM (...
577
11.0
MIPI C-PHY DSI TX (Transmitter/Host) IP in TSMC 22ULL
The MXL-CPHY-2p5G-DSI-TX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
578
11.0
MIPI C-PHY/D-PHY Combo 2-Lane CSI-2 TX+ IP in TSMC 40ULP
The MXL-CDPHY-2L-CSI-2-TX+-40ULP is a high-frequency, low-power, low-cost, sourcesynchronous, physical Layer supporting the MIPI Alliance Specificatio...
579
11.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps
The MXL-CD-PHY-CSITX+-ST-28FDSOI is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
580
11.0
MIPI C-PHY/D-PHY Combo DSI RX (Receiver) IP in TSMC 22ULP
The MXL-CDPHY-DSI-RX-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification f...
581
11.0
MIPI C-PHY/D-PHY Combo Universal IP, 4.5Gsps/4.5Gbps in TSMC 22ULP
The MXL-CD-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...
582
11.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
583
11.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 22ULL
The MXL-DPHY-CSI-2-TX+-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
584
11.0
MIPI D-PHY DSI RX (Receiver/Peripheral) in UMC 22ULP/22ULL
The MXL-DPHY-DSI-RX-U-22ULP-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
585
11.0
MIPI D-PHY IP 4.5Gbps in TSMC N7
The MXL-DPHY-DSI-TX-T-N07 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...
586
11.0
MIPI D-PHY Universal IP in TSMC 28HPC+
The MXL-DPHY-UNIV-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
587
11.0
MIPI D-PHY Universal IP in UMC 28HPC+
The MXL-DPHY-UNIV-U-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for...
588
11.0
MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
The MXL-MIPI-M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used ...
589
11.0
DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Command Stream List
The Digital Blocks DB-DMAC-MC2-CS-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memo...
590
11.0
DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
The Digital Blocks DB-DMAC-MC2-DL-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memo...
591
11.0
Automotive MIPI C-PHY/D-PHY Combo CSI-2 TX 4.5Gsps/trio in TSMC 28HPC+
The AUTO-MXL-CDPHY-4p5G-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Sp...
592
11.0
Automotive MIPI D-PHY CSI-2 RX (Receiver) in TSMC 16FFC
The AUTO-MXL-DPHY-CSI-2-RX-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specifica...
593
11.0
Automotive MIPI D-PHY CSI-2 RX (Receiver) in TSMC 28HPC+
The AUTO-MXL-DPHY-CSI-2-RX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for ...
594
11.0
Automotive MIPI D-PHY CSI-2 RX+ (Receiver) IP in UMC 40ULP
The AUTO-MXL-DPHY-CSI-2-RX+ is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification for...
595
11.0
Automotive MIPI D-PHY CSI-2 RX+ IP in TSMC 28HPC+
The AUTO-MXL-DPHY-CSI-RX+-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
596
11.0
Automotive MIPI D-PHY CSI-2 TX (Transmitter) in GlobalFoundries 22FDX
The AUTO-MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Specification for ...
597
11.0
Automotive MIPI D-PHY DSI TX (Transmitter) in TSMC 28HPC+
The AUTO-MXL-D-PHY-DSI-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specifica...
598
11.0
NVM Anti-Fuse OTP NeoFuse in DBHitek(90nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
599
11.0
NVM Anti-Fuse OTP NeoFuse in GLOBALFOUNDRIES (55nm, 40nm, 28nm, 22nm, 12nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
600
11.0
NVM Anti-Fuse OTP NeoFuse in HHNEC (55nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...