Design & Reuse
8685 IP
1751
0.118
PLL IP, Input: 372M - 540MHz, Output: 5MHz - 400MHz, UMC 0.13um HS/FSG process
Input 372M ~ 540MHz, output 5M ~ 400MHz, PLL, UMC 0.13um HS/FSG Logic process....
1752
0.118
PLL IP, Input: 372M - 540MHz, Output: 5MHz - 420MHz, UMC 0.11um HS/FSG process
Input 372M ~ 540MHz, output 5M ~ 420MHz, PLL, UMC 0.11um HS/FSG Logic process....
1753
0.118
DLL IP, Input: 800MHz - 1600MHz, Output: 800MHz - 1600MHz, UMC 28nm HPM process
Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 25% delay in period of FREF, UMC 28nm Logic and Mi...
1754
0.118
UMC 0.13um LL process PCI I/O cells. These I/O cells are designed to meet PCI-33 and PCI-66 applications. This IP is branched from 'FSC0L_D_50VT_PCI3366_IO'
UMC 0.13um LL process PCI I/O cells. These I/O cells are designed to meet PCI-33 and PCI-66 applications. This IP is branched from 'FSC0L_D_50VT_PCI33...
1755
0.118
Analog Front End IP for CMOS image processing applications
FXAFE010HF0A is an Analog Front End IP for CMOS image processing applications. FXAFE010HF0A is fabricated in UMC 55nm SP, low-k, logic process to enab...
1756
0.118
One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), Support retention and deep sleep modes with built-in power gating circuitry., UMC 55nm LP process
UMC 55um LP Low-K process One Port Register File compiler....
1757
0.118
One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), UMC 55nm LP process
UMC 55nm LP Logic process 0.425um2-Bit cell One Port Register File memory compiler....
1758
0.118
One Port Register File Compiler IP, HJTC 0.18um pFlash process
HJTC 0.18um pFlash process synchronous Single Port Register File memory compiler....
1759
0.118
One Port Register File Compiler IP, UMC 0.11um CIS process
UMC 0.11um CMOS Image Sensor 2P3M process synchronous high density Single Port Register File SRAM memory compiler....
1760
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process 1.41um2 cell One Port Register File memory compiler....
1761
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um AE eFlash HS process for One Port Register File compiler....
1762
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler....
1763
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process, One Port Register File memory compiler....
1764
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous Single Port Register File memory compiler....
1765
0.118
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um AE/LL eFlash process One Port Register File....
1766
0.118
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um LL/FSG process synchronous Single Port Register File SRAM memory compiler....
1767
0.118
One Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process 1.41um2 cell Single Port Register File (One Port Register File) memory compiler....
1768
0.118
One Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process standard asynchronous high density Single Port Register File SRAM memory compiler....
1769
0.118
One Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE Logic process Synchronous One Port Register File memory compiler with 1.41um2-Bit cell....
1770
0.118
One Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler....
1771
0.118
One Port Register File Compiler IP, UMC 0.13um CIS process
UMC 130nm CMOS Image SensorCu process One Port Register File compiler....
1772
0.118
One Port Register File Compiler IP, UMC 0.13um CIS process
UMC 0.13um 2P4M 1.5V CMOS Image Sensor process synchronous Single Port Register File SRAM compiler....
1773
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/LL fusion (FSG) process high density synchronous Single Port Register File SRAM memory compiler....
1774
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process synchronous Single Port Register File SRAM memory compiler....
1775
0.118
One Port Register File Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous Single Port Register File SRAM memory compiler....
1776
0.118
One Port Register File Compiler IP, UMC 0.13um SP process
UMC 0.13-micron 1.2V high speed (HS) Logic process synchronous Low Power Single Port Register File SRAM compiler....
1777
0.118
One Port Register File Compiler IP, UMC 0.13um SP/FSG process
UMC 0.13um SP/FSG Logic process high density synchronous Single Port Register File SRAM memory compiler....
1778
0.118
One Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous high density Single Port Register File SRAM memory compiler....
1779
0.118
One Port Register File Compiler IP, UMC 0.15um SP process
UMC 0.15um SP Logic process synchronous Single Port Register File SRAM memory compiler....
1780
0.118
One Port Register File Compiler IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process synchronous high density Single Port Register File SRAM memory compiler....
1781
0.118
One Port Register File Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous Single Port Register File SRAM memory compiler....
1782
0.118
One Port Register File Compiler IP, UMC 0.18um LL process
UMC 0.18um LL Logic process synchronous Single Port Register File SRAM memory compiler....
1783
0.118
One Port Register File Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous Single Port Register File SRAM memory compiler....
1784
0.118
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/UHS One Port Register File compiler with peripheral LVT....
1785
0.118
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K One Port Register File....
1786
0.118
One Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process One Port Register File with LVT....
1787
0.118
One Port Register File Compiler IP, UMC 28nm HPC process
UMC 28nm HPC process One Port Register File...
1788
0.118
One Port Register File Compiler IP, UMC 28nm SP process
UMC 28nm Logic process synchronous Ultra high speed Single Port Register File SRAM memory compiler....
1789
0.118
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/HVT Logic process with 6TSRAM (0.242 mm2) 1-port Register File memory compiler....
1790
0.118
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Single Port Register File memory compiler with LVT peripheral....
1791
0.118
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP One Port Register File with Sleep/retention/Nap mode feature....
1792
0.118
One Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP One Port Register File with Sleep/Retention/Nap mode & peripheral LVT feature....
1793
0.118
One Port Register File Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash with peripheral HVT One Port Register File....
1794
0.118
One Port Register File Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash One Port Register File with Power Gating....
1795
0.118
One Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm Standard Performance Low-K Logic process synchronous Single Port Register File SRAM using 0.425-Bit cell memory compiler....
1796
0.118
One Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density One Port Register File compiler....
1797
0.118
One Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process synchronous Low Power (PG-DC) using 0.425-Bit cell Single Port Register File memory compiler....
1798
0.118
One Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm SP Low_K Logic process synchronous high density One Port Register File compiler....
1799
0.118
One Port Register File Compiler IP, UMC 65nm LL process
UMC 65nm LL/RVT Low-K Logic process synchronous Single Port SRAM....
1800
0.118
One Port Register File Compiler IP, UMC 65nm SP process
UMC 65nm standard performance process synchronous high density Single Port Register File SRAM memory compiler....