Design & Reuse
1932 IP
1751
0.0
Two port register file (1R1W) with low power retention mode
Low Leakage. Mobile Semiconductor's Bulk 22 ULL Register file memory compiler generates dual port Register File instances using the Bulk 22ULL proces...
1752
0.0
Two Port Register File compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 64 k
Foundry sponsored - Two Port Register File compiler - TSMC 55 nm uLP - Memory optimized for high density and low power - Dual Voltage - compiler range...
1753
0.0
AES Engine IP
YEESTOR s AES engine (ESAES) IP is a high-performance cryptographic engine operates in AES (Rijndael) NIST Federal information processing standard FIP...
1754
25.0
MIPI CSI2 Transmit Controller
The Veriest Solutions MIPI CSI-2 v1.1 Transmit Controller facilitates transmission over a standard high-speed unidirectional serial interface between ...
1755
25.0
MIPI CSI2 v1.3 Transmit Controller
The Veriest Solutions MIPI CSI-2 v1.3 Transmit Controller facilitates transmission over a standard high-speed unidirectional serial interface between ...
1756
25.0
Flash SPI controller master/slave
Veriest's SPI Master Controller IP provides an industry standard data communication channel between the AMBA APB and SPI buses. It supports SPI master...
1757
25.0
Quad-SPI FLASH Controller AHB
The Veriest Serial Flash Controller Design IP offers a rich set of features to facilitate easy access to Serial Flash devices. The CPU can boot direc...
1758
3.0
High Performance, Low Latency PCIe Gen5 PHY
Terminus Circuits offers best-in-class PHY IP for PCI Express Gen 5/4/3/2/1. The PHY is designed for low latency, low power, small form factor, high i...
1759
3.0
High Speed Low Jitter 16GHz Output LC PLL
Terminus Circuits offers an Analog Phase Locked Loop which is a LC oscillator-based integer-N PLL IP powered at 900 mV. The PLL operates with input re...
1760
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in GF 28SLP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1761
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1762
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1763
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1764
3.0
Single Lane and Quad Lane 16Gbps PCIe4.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN4.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
1765
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in GF 28SLP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol a...
1766
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
1767
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
1768
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
1769
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in GF 28SLP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1770
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1771
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1772
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
1773
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY in Samsung 28LPP process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
1774
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in GF 28SLP process
TERMINUS-CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single &Quad-Lane PCI Express PHY that supports PCI Express protocol and...
1775
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
1776
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 65G process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
1777
3.0
MIPI 4.1 M-PHY HS Gear 4
MIPI M-PHY HS Gear 4 IP is compliant with the MIPI serial communication protocol for use in mobile systems where performance, power, and efficiency ar...
1778
3.0
Low Jitter 1.25GHz to 2.5GHz Quadrature Output PLL
Terminus Circuits offers High speed, low Jitter PLL with 1.25GHz to 2.5GHz output. The ring oscillator based PLL provides balanced quadrature output. ...
1779
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in GF 28SLP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
1780
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 55LP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
1781
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 65GP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
1782
3.0
Multi-Link Multi-Protocol SerDes 16Gbps in TSMC 28HPC
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
1783
0.0
6-cluster Power Consumption & Performance Efficiency Enhanced Series6XT 3D/2D/Compute GPU including OpenGL ES 3.0, DX10_0 Featur
The PowerVR Series6XT family is based on the Rogue architecture, includes GPUs ranging from two to six clusters and builds on the previous Series6 fam...
1784
0.0
2-cluster Power Consumption & Performance Efficiency Enhanced Series6XT 3D/2D/Compute GPU including OpenGL ES 3.0, DX10_0 Feature Level and OpenCL Support , 10-bit YUV, YUV framebuffer, ASTC
The PowerVR Series6XT family is based on the Rogue architecture, includes GPUs ranging from two to six clusters and builds on the previous Series6 fam...
1785
0.0
4-cluster Power Consumption & Performance Efficiency Enhanced Series6XT 3D/2D/Compute GPU including OpenGL ES 3.0, DX10_0 Feature Level and OpenCL Support, 10-bit YUV, YUV framebuffer, ASTC
The PowerVR Series6XT family is based on the Rogue architecture, includes GPUs ranging from two to six clusters and builds on the previous Series6 fam...
1786
0.0
2-cluster Series6XT 3D/2D/Compute GPU including OpenGL ES 3.0, DX10_0 Feature Level and OpenCL Support , 10-bit YUV, YUV framebuffer
The PowerVR Series6XT family is based on the Rogue architecture, includes GPUs ranging from two to six clusters and builds on the previous Series6 fam...
1787
0.0
D-MOT-10 FPGA IP Core For Motion Detection In Video Stream Images
The D-MOT-10 FPGA IP core for motion detection in video stream images is a completed module intended to be used in vision systems for various applicat...
1788
0.0
802.11 Access Point SoC verification Platform
The VV9100 verification platform is actually an expansion of the general VV9000 Platform. In addition to the SoC features of the VV9000, it also conta...
1789
0.0
10G Base T Ethernet PHY
Terminus Circuits presents a state-of-the-art Ethernet PHY IP, supporting 100 Mbps, 1 Gbps, and 10 Gbps data rates. Purpose-built for performance-driv...
1790
0.0
Safe and Secure CAN bus IP
The Sital Safe and Secure CAN IP ( SnS CAN IP ) core is ideally suited for automotive ,industrial and aerospace applications such as automotive CAN b...
1791
0.0
Mali C52 - Image Signal Processor Solution for Intelligent Devices
The Mali-C52 delivers class-leading high dynamic range (HDR) image quality and state-of-the-art image signal processing (ISP) in real-time, and can be...
1792
0.0
Mali Camera
Mali-C71 is the first product in the Mali Camera series of Image Signal Processors (ISP) from Arm s imaging & Vision Group. Mali-C71 was developed for...
1793
0.0
Mali-470 graphics processor (GPU)
The Arm Mali-470 graphics processor (GPU) doubles the energy-efficiency of the successful Utgard family of graphics products while maintaining perform...
1794
0.0
Mali-C52
The Arm Mali-C52 Image Signal Processor (ISP) delivers image quality that is available in two configurations. Mali-C52 can be optimized for image qual...
1795
0.0
MALI-C71AE
Mali-C71AE is Arm’s highest performance image signal processor (ISP) developed for the emerging smart automotive systems and industrial markets. Deliv...
1796
0.0
Mali-C78AE
Mali-C78AE is designed for use in combined advanced driver assistance systems (ADAS) and surround view applications that share cameras for both functi...
1797
0.0
Mali-C78AE
Mali-C78AE is designed for use in combined advanced driver assistance systems (ADAS) and surround view applications that share cameras for both functi...
1798
0.0
Mali-G51
The Arm Mali-G51 is the latest offering in the High Area Efficiency line of Arm s Mali family of GPUs, the number one shipping GPUs in the world. The ...
1799
0.0
Mali-G52
The Arm Mali-G52 is the second Bifrost-based mainstream GPU from Arm. Designed to bring premium visual experiences to the ever-growing mainstream mobi...
1800
0.0
Mali-G57 GPU
Taking High-Fidelity Games Mainstream First-generation Valhall-based graphics processing unit (GPU) for the mainstream market. Increased performance ...