701 10.0

18-40MHz Xtal Oscillator - TSMC CLN2P High end consumer and professional applications require crystals with a minimum number of external components. These applications typically operate un...

702 10.0

38.4MHz Crystal Oscillator Pad-TSMC 28 HPC+ Analog Bits offers a wide variety of IO. This low power Oscillator is optimized for consumer applications...

703 10.0

28G LR Ethernet PHY in GF (12nm) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

704 10.0

28G LR Ethernet PHY in Samsung (8nm, SF5A) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

705 10.0

28G LR Ethernet PHY in TSMC (16nm, N7, N6) The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

706 10.0

CAN Bus Controller with Message Filter (configurable) CANmodule-IIx is a full functional CAN controller module that contains advanced message filtering, and receive-, and transmit buffers. It is designed ...

707 10.0

CAN Bus Controller with Message Filter (Mailbox concept) CANmodule-IIIx is a full functional CAN controller module that supports the concept of mailboxes. It is compliant to the international CAN standard de...

708 10.0

CAN Bus Controller with Message Filter (Mailbox concept) CANmodule-III is a full functional CAN controller module that supports the concept of mailboxes. It is compliant to the international CAN standard def...

709 10.0

Band Gap Voltage Generator - TSMC CLN3E Analog Bits’ regulator macro addresses typical SOC power supply and other voltage regulation needs in a fully integrated easy-to-use macro. The output...

710 10.0

Bandgap - TSMC CLN3A Analog Bits’ Integrated Bandgap macro comprehensively addresses typical SOC voltage reference needs in a fully integrated easy-to-use macro. The Integ...

711 10.0

Bandgap - TSMC CLN3P Analog Bits’ Integrated Bandgap macro comprehensively addresses typical SOC voltage reference needs in a fully integrated easy-to-use macro. The Integ...

712 10.0

RapidIO VIP and Compliance verification Solution Mobiveil’s RapidIO Verification IP (VIP) provides highly capable compliance verification solution for the RapidIO protocol. The RapidIO VIP is system ...

713 10.0

CAT Trip Sensor, TSMC N3 The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...

714 10.0

CAT Trip Sensor, TSMC N3EP The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...

715 10.0

CAT Trip Sensor, TSMC N5 The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...

716 10.0

CAT Trip Sensor, TSMC N6 The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...

717 10.0

WAVE521, H.265, HEVC, H.264, AVC video encoder IP for 4K WAVE521 is a 4K multi-format encoder IP to support both HEVC/H.265 and AVC/H.264 video formats. It is capable of encoding HEVC Main/Main 10/Main Sti...

718 10.0

WAVE521CL, H.265, HEVC, H.264, AVC video codec IP for 4K low-cost WAVE521CL is a low-cost 4K codec IP to support HEVC/H.265 and AVC/H.264 video standards. The codec IP is capable of encoding 4K60fps@500MHz with HEV...

719 10.0

WAVE521L, H.265, HEVC, H.264, AVC video encoder IP for 4K low-cost WAVE521L is a low-cost 4K encoder IP to support HEVC/H.265 and AVC/H.264 video standards. The IP core provides high-performance encode capability up t...

720 10.0

WAVE633LC, H.265, HEVC, H.264, AVC, video codec IP for 4K low-cost WAVE633LC is a 4K multi-standard video codec IP that supports HEVC/H.265 and AVC/H.264 video codec standards. WAVE633LC targets Low Cost, so B-frame i...

721 10.0

HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard Synopsys HBM3 Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC HBM3 standard. The controller interoperates wit...

722 10.0

HBM3 PHY IP at 7nm OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

723 10.0

PCI Express GEN 3/4 Port SERDES PHY - Samsung 14LPP Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...

724 10.0

PCI Express GEN 3/4 Port SERDES PHY - Samsung 7LPP Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY ...

725 10.0

PCI Express GEN 4/5 Port SERDES PHY - Samsung 8LPP Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY ...

726 10.0

PCI Express GEN-3/Display Port SERDES PHY - Samsung 28 28LPP Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...

727 10.0

PCI Express GEN-3/SATA3 SERDES PHY - Samsung 28 28FDSOI Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...

728 10.0

PCIe 4.0 LP PHY in TSMC (N7) for Automotive The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

729 10.0

PCIe 4/5 Refenece Clock PLL with SSCS - GLOBALFOUNDRIES 12LP+ Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY...

730 10.0

PCIe 5.0 PHY NCS in TSMC (N7, N6, N6C, N5, N3P) The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...

731 10.0

PCIe Gen 4/5/6 Ref Clock SSCG PLL - TSMC CLN2P Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...

732 10.0

PCIe Gen 4/5/6 Ref Clock SSCG PLL - TSMC CLN7FF Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...

733 10.0

PCIe Gen4/5 Ref SSCG PLL - TSMC CLN3A Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...

734 10.0

PCIe Gen4/5 Ref SSCG PLL - TSMC CLN3E Analog Bits’ PCIe REF PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen4 and Ge...

735 10.0

PCIe/HCSL Differential IO Buffer - TSMC 16FFC Analog Bits offers a unique set of IP's that is used for various SERDES applications. This unique IP is used for sending source clocks to SERDES for P...

736 10.0

PCIe3 SSCG PLL - GLOBALFOUNDRIES 12LP Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 ...

737 10.0

PCIe3 SSCG PLL - GLOBALFOUNDRIES 12LP+ Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 ...

738 10.0

PCIe3 SSCG PLL - TSMC 12FFC Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY...

739 10.0

PCIe3 SSCG PLL - TSMC 16FFC Analog Bits’ PCIe Gen3 SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Express Gen3 ...

740 10.0

PCIe4 Ethernet SERDES PHY - TSMC N5 Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY...

741 10.0

PCIe5 Ref Clock SSCG PLL - TSMC 6FF Analog Bits’ PCIe Gen 5 Ref Clock SSCG PLL addresses stringent performance requirements in high-speed serial link applications that support the PCI Ex...

742 10.0

SD 3.0 / SDIO 3.0 Combo Device Controller The SD / SDIO 3.0 Combo Device IP Core is a high performance controller capable of interfacing with memory cards and I/O applications such as WLAN, Bl...

743 10.0

SD 4.0 Device Controller The SD 4.0 Device IP core is used to implement SD cards connected to a Host processor over standard SD bus. The flexible architecture of SD Device IP ...

744 10.0

SD 4.1 SDIO 4.1 Host Controller IP The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a highly integrated host controller IP solution that supports two key memory card I/O technologies:...

745 10.0

SD/eMMC in GF (12nm) To address today’s content capacity and bandwidth requirements, JEDEC and SD Association continue to define new functionality and enhancements for emb...

746 10.0

SD/eMMC in TSMC (28nm, 16nm, 12nm, N7, N6) To address today’s content capacity and bandwidth requirements, JEDEC and SD Association continue to define new functionality and enhancements for emb...

747 10.0

GDDR6 PHY IP for 12nm OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

748 10.0

SDIO 3.0 Device Controller Arasan's SDIO 3.0 Device IP is used to implement high-performance SDIO cards that connect to a Host processor over a standard SD bus. The SDIO 3.0 Dev...

749 10.0

HDMI 1.4 RX LINK Silicon Library's HDMI1.4b RX Link IP is the best choice for our PHY IPs. Customer's function can be included on request....

750 10.0

HDMI 1.4 TX LINK Silicon Library's HDMI1.4b TX Link IP is the best choice for our PHY IPs. Customer's function can be included on request....