Design & Reuse
3828 IP
151
30.0
DDR4 Verification IP
Truechip's DDR4 Verification IP provides an effective & efficient way to verify the components interfacing with DDR4 interface of an ASIC/FPGA or SoC....
152
30.0
Perceptual Video Quality Optimization IP
Today's media streaming market demands optimal quality video at the lowest possible data rate, as you need to enhance service users' viewing experienc...
153
30.0
UFS Host Controller 4.1 IP
The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platforms. It provides comma...
154
30.0
High speed NoC (Network On-Chip) Interconnect IP
OPENEDGES is the only total memory system IP company providing both memory controller and on-chip interconnect. OIC is the ORBIT high-speed On-chip In...
155
30.0
Highly scalable inference NPU IP for next-gen AI applications
OPENEDGES, the total memory subsystem IP provider, introduces ENLIGHT Pro, a state-of-the-art inference neural processing unit (NPU) IP that outperfor...
156
30.0
Low-power, high-speed 12-bit, 8 GSPS Analog to Digital Converter (ADC) IP block TSMC 28nm HPC+ process
The A12B8G is a low-power, high-speed analog to digital converter (ADC) intellectually property (IP) design block. It is a time interleaved (TI) succe...
157
30.0
IP platform for intelligence gathering chips at the Edge
Designed to be the solution for an AI compute device right at the Edge, Aion Silicon (formerly Sondrel) new SFA 100 IP reference platform makes creati...
158
30.0
zstd compression and decompression IP core
The zstd (Zstandard) compression algorithm is an advanced, lossless data compression technology. It has quickly become a popular choice for a variety ...
159
30.0
Quad core IP platform with integrated Arm security subsystem
Aion Silicon (formerly Sondrel) has created a powerful, quad core IP platform, the SFA 200, that is ideal for ASIC solutions for remote gathering and ...
160
30.0
Multi-channel, multi-speed Ethernet universal media access control (MAC) and physical coding sublayer IP (UMAC)
CoMira’s multi-channel, multi-speed Ethernet universal media access control (MAC) and physical coding sublayer IP (UMAC) is fully configurable and pro...
161
30.0
NVM Express Host IP Core
The IPM-NVMe_Host core is a verilog IP to be integrated in a FPGA or ASIC design. It fully manages the NVMe and PCIe protocol on the host side without...
162
30.0
LZ4 compression and decompression IP core
The LZ4 compression algorithm is a fast, lossless data compression technology renowned for its high-speed performance and low latency. LZ4 offers impr...
163
29.5
Pulsar Video Decoder IP - D105
Allegro DVT’s AL-D105 is a multi-format, multi-stream, video decoder IP core, capable of decoding 12 different video formats up to H.264/AVC 1920x1080...
164
29.5
Pulsar Video Decoder IP - D301
D301 is the Allegro DVT’s MPEG-5 Low Complexity Enhancement Video Coding (LCEVC) decoder IP solution. The D301 LCEVC decoder IP is optimized for power...
165
29.0
USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
The OTS9106 board is a complete FPGA and ARM processor based USB PD Type-C port, featuring the RTL and C source code of the Obsidian Technology OTI910...
166
26.0
HDMI 2.0b IP Core
The Bitec HDMI 2.0b IP Core enables HDMI interconnectivity without the need for external HDMI ASSP devices. Supporting pixel clocks to 600Mhz, the IP ...
167
26.0
HDMI 2.1 IP Core
The Bitec HDMI 2.1b IP Core enables HDMI interconnectivity in FPGA or ASIC devices. Supporting uncompressed video formats to 8K60 4:2:0 and beyond for...
168
26.0
VESA Display Stream Compression (DSC) IP Core
Display Stream Compression offers inter-operable, visually lossless real-time, video compression to satisfy the emerging high bandwidth and high resol...
169
26.0
DisplayPort 1.4a IP Core
DisplayPort heralds a new alternative in video connectivity. Designed to enable low cost direct drive monitors and backed by industry leaders (Intel, ...
170
25.0
MIPI C-PHY-D-PHY Combo PHY IP on TSMC 28nm HPC+
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.0 improves throughput over a bandwidth limited channel, allowing more data without in...
171
25.0
TSMC 12nm 16Gbps SerDes IP supporting multiple serial protocols
A high-performance, low-power 16Gbps SerDes IP supporting multiple serial protocols. Integrated PMA and PCS layers with advanced equalization and diag...
172
25.0
DVB-S2 Demodulator IP Core
DVBS2_DEMOD.vhd performs the demodulation based on three tracking loops: carrier tracking (for coherent demodulation), symbol timing tracking, and A...
173
24.5
Zinia Pixel Processor IP - PP300 Series
Allegro DVT’s PP300 IP is a flexible Pixel Processor that provides a wide range of processing functions. The PP300 IP offers various system integra...
174
24.5
Prism Video Encoder IP – E100 Series
Allegro DVT’s E100 Series of Encoder IP enables HD/1080P60 resolution encoding up to 5MPixels in a single core. The E100 Series Encoder is built ar...
175
24.5
Prism Video Encoder IP – E300 Series
Allegro DVT’s E300 Series of Encoder IP features a new hardware architecture that minimizes the silicon area while enabling 4K resolution encoding in ...
176
24.5
Prism Video Encoder IP – E301
E301 is the Allegro DVT’s MPEG-5 Low Complexity Enhancement Video Coding (LCEVC) encoder IP solution. The E301 LCEVC encoder IP is optimized for power...
177
24.5
Pulsar Video Decoder IP - D100 Series
D100 Series is the Allegro DVT’s ultimate multi-format, multi-stream real-time hardware decoder IP core, for all semiconductor manufacturers looking t...
178
24.5
Pulsar Video Decoder IP - D300 Series
D300 Series is the Allegro DVT’s ultimate multi-format, multi-stream real-time hardware decoder IP core, for all semiconductor manufacturers looking t...
179
24.5
Juno Neural Video Processor IP - NVP300 Series
Allegro DVT’s NVP300, AI-based Neural Video Processing IP push video quality to the next level by leveraging the advanced features and benefits of AI ...
180
20.0
13-bit, 80 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 65nm
The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid-SAR ADC, with 13-bit ...
181
20.0
PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection
M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 5.0 IP suppo...
182
20.0
UCIe Verification IP
Truechip's UCIe Verification IP provides an effective & efficient way to verify the UCIe components of an IP or SoC. Truechip's VIP is fully compliant...
183
20.0
GDDR6 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
184
20.0
Secure-IC's Securyzr™ Memory & Bus Protection IP Core
The Memory & Bus Protection IP Core module enables on-the-fly encryption/decryption and authentication to the external memory. It supports AHB/AXI sl...
185
20.0
AES-XTS encryption/decryption IP
SphinX is designed to accommodate the speed, latency and throughput requirements of high performance computer systems main memory / DRAM. The IP imple...
186
20.0
GF 6-bit, 10 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm
The A6B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...
187
20.0
High-Performance AES-GCM/CTR IP
The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand...
188
20.0
High-Performance AES-XTS/ECB IP
Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external data centers and the c...
189
20.0
MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and 55nm)
MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pi...
190
20.0
MIPI UniPro IP for reliable, high-performance and low power link between devices in mobile devices
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
191
20.0
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...
192
20.0
NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Truechip's NoC Silicon IP provides chip designers and architects with an efficient way to connect multiple TileLink based master and slave devices wit...
193
20.0
IP Prototyping Kits for USB, DDR, MIPI, PCI Express protocols
The Synopsys IP Prototyping Kits, part of the IP Accelerated initiative, center around a complete, out-of-the-box reference design that consists of a ...
194
20.0
LPDDR4/3, DDR4/3 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
195
20.0
LPDDR4x/4 PHY IP for 22nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
196
20.0
Pre-verified Interface IP Subsystems reduce design risk and accelerate time-to-market
Customers are increasingly utilizing third-party standards-based IP in their designs, but face several challenges. With more IP and more complex inter...
197
20.0
Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
KJN-S1 is able to get Higher performance lossless Compression by original algorithm. This product achieves a smaller circuit scale and higher compress...
198
20.0
USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support
M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5....
199
20.0
Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
"The CetraC Switch IP core is the ideal solution to interconnect any Ethernet, TSN and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...
200
20.0
Multi Protocol Switch IP Core for Safe and Secure Ethernet Network
"The CetraC Switch IP core is the ideal solution to interconnect any TSN, Ethernet and ARINC 664 Part 7 (AFDX) equipment for safety critical applicati...