Design & Reuse
5483 IP
101
14.0
MIPI D-PHY for TSMC
D-PHY physical layer Developed by experienced teams with industry-leading domain expertise and extensively validated by multiple hardware platforms, ...
102
14.0
MIPI DSI TX Controller
DSI transmitter controller for application The Cadence® Transmitter (TX) Controller IP for MIPI DSI is compliant with the MIPI® Alliance Specificatio...
103
14.0
UltraLink Controller
Ultralink controller for high performance die-to-die interconnect on streaming, CXS, and AXI protocols The Cadence Ultralink Controller enables a pro...
104
14.0
Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Ultra-low latency UCIe controller for standard industry chiplet interoperability on streaming, PCIe, and CXL protocols The Cadence UCIe™ Controller i...
105
14.0
Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Ultra-low latency UCIe controller for standard industry chiplet interoperability on streaming, PCIe, and CXL protocols The Cadence UCIe™ Controller i...
106
14.0
Controller for MIPI Soundwire
Audio data transport The Cadence® IP Family for MIPI® Protocols delivers area-optimized interface IP with the low power and high performance required...
107
14.0
USB 2.0 Controller
Mature controller solution for OTG and Device applications Certified for compliance with Universal Serial Bus Specification, Revision 2.0, the Cadenc...
108
14.0
USB 2.0 PHY for TSMC
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory fo...
109
14.0
USB 3.0 xHCI Host Controller
Mature solutions featuring xHCI Host, Device, and Dual-Role Device Compliant with Universal Serial Bus 3.0 Specification, Revision 1.0 and xHCI Speci...
110
14.0
USB 3.1 Device Controller
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, th...
111
14.0
USXGMII Ethernet PCS (PCSR_X)
The Cadence USXGMII PCS (PCSR_X) IP provides the logic required to integrate a USXGMII, 5GBASE-R, or 10GBASE-R PCS into any system on chip (SoC). The...
112
14.0
Ethernet XAUI PCS
Integrates MAC IP to a broad range of PHY and SerDes IP The Cadence Ethernet XAUI Physical Coding Sublayer (PCS) IP provides the logic required to in...
113
14.0
Dual-Role Device Controller for USB 3.0
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.0 Specification v1.0, and xHCI Specification v1.0, th...
114
14.0
Dual-Role Device Controller for USB 3.1
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, th...
115
14.0
CXL Controller
Low-latency Controller IP for cache-coherent root-port, end-point, and dual-mode applications The Cadence® Controller IP for CXL provides the logic r...
116
10.0
D-phy 1.2 on tsmc 22nm with ultra low power
Arasan Chip Systems announces the immediate availability its MIPI D-PHY IP supporting speeds of upto 2.5 gbps for TSMC 22nm SoC designs. The MIPI D-...
117
10.0
I3C Device Controller v1.2
The Arasan I3C Device Controller IP Implements Device Controller functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is us...
118
10.0
I3C Dual Controller v1.2
The Arasan I3C Secondary Controller IP Core implements Active controller functionality as defined by the MIPI Alliance’s I3C Specification and Seconda...
119
10.0
I3C Slave Controller
The Arasan I3C Slave Controller IP Core Implements Slave functionality as defined by the MIPI Alliance’s I3C Specification. The I3C bus is used for va...
120
10.0
SD 3.0 / SDIO 3.0 Combo Device Controller
The SD / SDIO 3.0 Combo Device IP Core is a high performance controller capable of interfacing with memory cards and I/O applications such as WLAN, Bl...
121
10.0
SD 4.0 Device Controller
The SD 4.0 Device IP core is used to implement SD cards connected to a Host processor over standard SD bus. The flexible architecture of SD Device IP ...
122
10.0
SD 4.1 SDIO 4.1 Host Controller IP
The SD 4.1/SDIO 4.1 IP from Arasan Chip Systems is a highly integrated host controller IP solution that supports two key memory card I/O technologies:...
123
10.0
SDIO 3.0 Device Controller
Arasan's SDIO 3.0 Device IP is used to implement high-performance SDIO cards that connect to a Host processor over a standard SD bus. The SDIO 3.0 Dev...
124
10.0
MIPI D-PHY TSMC 130nm
Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...
125
10.0
MIPI D-PHY TSMC 28nm HPC+ @ 2.5Ghz
The Arasan’s MIPI D-PHY Analog Transceiver IP Core is fully compliant to the D-PHY specification version 1.1. It supports the MIPI® Camera Serial Inte...
126
10.0
MIPI DSI-2 Transmit Controller v1.0
The Arasan DSI-2 Device Controller IP is designed to provide MIPI DSI-2 1.0 compliant high speed serial connectivity for mobile host processors using ...
127
10.0
MIPI I3C PHY I/O
Arasan’s MIPI I3CⓇ PHY I/O IP, in compliance with MIPI I3CⓇ specifications v1.1. Arasan’s MIPI I3CⓇ PHY IP is part of Arasan’s Total IP Solution for M...
128
10.0
MIPI M-PHY Designed For TSMC 28nm
ACS-AIP-MPHY-28HPM MIPI Specification Version 3.0 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. A...
129
10.0
MIPI M-PHY G4 Designed For TSMC 28nm HPC+
ACS-AIP-MPHY-28HPC+ MIPI Specification Version 4.1 is a low pin count, power efficient, inter-chip serial interface with high bandwidth capabilities. ...
130
10.0
eMMC 4.51 Device Controller
Arasan's eMMC 4.51 Memory controller is compliant with the latest MMC 4.51 specification released by JEDEC. The controller provides a peak bandwidth o...
131
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 16FF PLUS LL
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
132
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 16FFC NS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
133
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28 HPC-EW
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
134
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPC PLUS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
135
10.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 40LP-EW
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
136
10.0
ONFI 3.2 NAND Flash Controller
The Arasan ONFI 3.2 compliant NAND Flash Controller IP Core is a full featured, easy to use, synthesizable design that is easily integrated into any S...
137
10.0
Complete suite of development tools, ARC development systems and operating systems for embedded software application development
Synopsys offers a complete suite of development tools, ARC development systems and operating systems, providing everything a developer needs to effici...
138
8.0
FortifyIQ's Secure Hybrid Crypto Box IP Core with Classical and Post-Quantum Cryptography for Embedded Systems (AES, HMAC-SHA2, ECC/RSA etc., PQC) (SCA,DPA,FIA secure)
FortifyIQ’s Hybrid Crypto Box IP core is a comprehensive, high-efficiency cryptographic solution that combines RSA, ECC, AES, and SHA-2/HMAC with a bu...
139
6.0
I2C Master/Slave Controller Core IP
I2C Master/Slave Controller core implements a bidirectional serial interface compatible with the NXP’s I2C bus specification and supports all transfer...
140
6.0
UART : Universal Asynchronous Receiver Transmitter Core
Universal Asynchronous Receiver Transmitter Core performs serial-to-parallel conversion on data characters received from a peripheral device or a MODE...
141
6.0
SD Memory Card Host Controller
VinSDHC3_0 SD Host Controller Core controls data transfers between the SD Host System and the SD Memory Card sockets. It is compliant with the standar...
142
6.0
AHB To PCI Wrapper
VinChip’s AHB to PCI wrapper can be used to verify AHB (AMBA) based systems on a PCI environment for ease of debugging the target hardware and it can ...
143
6.0
Embedded Host Controller 1. 1
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144
6.0
Embedded Host Controller 2.0
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145
6.0
ONFI : Open NAND Flash Interface Host Controller
NAND Flash Interface controller that provides the means for a system to be designed that supports a range of NAND Flash devices without direct design ...
146
6.0
Low power, high performance 32-bit processor
VinRZ5110 is a low power, high performance 32-bit processor solution targeting embedded applications where low power and system cost are of utmost imp...
147
6.0
USB 1.1 Hub Controller
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148
6.0
USB 1.1 Open Host Controller
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149
6.0
USB 2.0 Device Controller (IF Certified)
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150
6.0
USB 2.0 Host Controller (EHCI)
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