Design & Reuse
5343 IP
801
50.0
Modern, high performance Audio DSP, optimized for far-field noise reduction and Artificial Intelligence speech recognition
The Ceva-BX2 audio/voice DSP is targeted for high performance audio devices such as DTV, Smart Speaker, Soundbar, and car infotainment systems. Ceva-...
802
50.0
LPDDR5/4x/4 combo PHY on 14nm, 12nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
803
50.0
Open RAN Platform for Base Station and Radio
Industry’s First Comprehensive 5G Baseband Platform IP for 5G RAN ASICs and Open RAN Building on more than a decade of leadership in baseband IP solut...
804
50.0
Quad SPI Controller
The Serial Peripheral Interface or SPI-bus is a simple 4- wire serial communications interface used by many peripheral chips that enable the controlle...
805
50.0
Multi-protocol wireless plaform integrating 802.11ax (Wi-Fi 6), Bluetooth 5.4 Dual Mode, 802.15.4 (for Thread, Zigbee and Matter)
Ceva-Waves Links is a versatile family of multi-protocol wireless platform IPs, encompassing the latest consumer wireless standards. It leverages the ...
806
50.0
Turnkey eNB-IoT Release 15 & multi-constellation GNSS IP solution for IoT devices
Ceva has designed a complete eNB-IoT IP solution that can serve a wide range of applications. The Ceva-Waves Dragonfly NB2 pre-integrates together a C...
807
50.0
Hyperbus Flash Memory Controller
Emerging high-performance applications demand increasingly fast read throughputs from NOR-flash memory devices. At the same time, the pin-count requir...
808
46.0
32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 31 order, up to 32Gbps. Error count is accurate: no double counts or omissions reg...
809
46.0
32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7 or 15 order, up to 32Gbps. Error count is accurate: no double counts or omission...
810
46.0
32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7, 15 or 31 order, up to 32Gbps. Error count is accurate: no double counts or omis...
811
40.0
RapidIO Controller with V4.1 Support
Mobiveil's RapidIO Controller solution (GRIO) is a highly flexible and configurable IP. The Mobiveil RapidIO Controller Solution can be used as a Host...
812
40.0
LDPC Decoder for 5G NR and Wireless
Mobiveil's 5G NR LDPC Decoder IP Core offers a robust solution for LDPC decoding, featuring a dedicated LDPC decoder block for optimal performance. It...
813
40.0
VESA DisplayPort DP 1.4a / eDP 1.4b RX PHY , MST
Silicon Library's VESA DP 1.4a / eDP 1.4b RX PHY IP supports 1.62Gbps , 2.7Gbps , 5.4Gbps and 8.1Gbps , depending on the technology node. This silico...
814
40.0
VESA DisplayPort DP 1.4a / eDP 1.4b TX PHY
Silicon Library's VESA DP 1.4 a/ eDP 1.4b TX PHY IP supports 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps, depending on the technology node. This silicon p...
815
40.0
Ceva-Waves 802.11be (Wi-Fi 7) 2x2 MAC & Modem AP
The Ceva-Waves Wi-Fi IP family offers a comprehensive suite of IPs and platforms for embedding Wi-Fi connectivity into SoCs/ASSPs addressing a broad r...
816
40.0
CFrame70, DSC compression, decompression IP
The Chips&Media’s CFrame70 is VESA DSC Hardware IP, designed to significantly reduce memory size, DRAM bandwidth and power. This ultra-small, highly ...
817
40.0
UFS 3.0 Host Controller with AES Encryption compatible with M-PHY 4.0 and UniPro 1.8
Arasan's Universal Flash Storage 3.0 (UFS 3.0) is a simple but high performance, serial interface primarily used in mobile systems, between host proce...
818
40.0
MIPI RFFE Master Controller IP Core v3.0
Mobile radio communication systems are complex multi-radio systems comprising several transceivers. Arasan supports the latest MIPI RFFE standard v3.0...
819
40.0
eMMC 5.1 Device Controller
Arasan's eMMC 5.1 Memory controller is compliant with the latest eMMC 5.1 specification released by JEDEC. The controller provides a peak bandwidth of...
820
40.0
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
821
40.0
LPDDR5X/5/4X/4 PHY for 16nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
822
40.0
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
823
40.0
CXL 2.0 Agilex FPGA Acclerator Card
Mobiveil’s CXL-Aglx Accelerator platform is a PCIe® Gen5 add-in card with latest Intel’s Agilex I series FPGA. It supports High-Performance Applicatio...
824
35.0
50G PON LDPC
Mobiveil’s 50G PON LDPC Encoder/Decoder offers industry-leading LDPC error correction in a low-power, small-footprint, high-reliability solution. LDPC...
825
35.0
xSPI Master IP | NOR IP
Arasan Chip Systems, the leading provider of IP for Mobile Storage Standards, presents its latest xSPI Master IP for access to NOR Flash Devices. This...
826
30.0
4-/8-bit mixed-precision NPU IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
827
30.0
8-bit, 10 GSPS Analog-to-Digital Converter (ADC) IP block GlobalFoundries 22nm
The A8B10G is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, ...
828
30.0
6-bit, 20 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm
The A6B20G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...
829
30.0
1.6T Ethernet UMAC
CoMira’s 1.6T Ethernet UMAC IP is designed to fulfill the MAC, PCS, and FEC requirements outlined in the IEEE 802.3-2022, IEEE 802.3ck, IEEE 802.3df, ...
830
30.0
12-bit, 200 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 28nm
The A12B200M is a low-power, analog to digital converter (ADC) intellectually property (IP) design block. It is a hybrid successive approximatio...
831
30.0
12-bit, 5 GSPS Digital-to-Analog Converter (DAC) IP block GlobalFoundries 22nm
The D12B5G is a low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block. It is a current-steering DAC that has a 1...
832
30.0
12-bit, 500 MSPS Digital-to-Analog Converter (DAC) IP block GlobalFoundries 55nm
The D12B500M is an ultra low-power, high-speed digital to analog converter (DAC) intellectual property (IP) block. It is a current steering DAC that h...
833
30.0
12-bit, 9 GSPS High Performance Swift™ ADC in 16nm CMOS
The ODT-ADS-12B9G-16 is an ultra high-performance time-interleaved 12-bit 9GSPS ADC on 16nm CMOS process. This Swift™ ADC supports input bandwidth sig...
834
30.0
I3C Host Controller v1.2
The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard off...
835
30.0
RapidIO to AXI Bridge (RAB)
Mobiveil's RapidIO-AXI Bridge (RIO-AXI Bridge) is a highly flexible and configurable IP used along with Mobiveil native RapidIO Controller (GRIO) to p...
836
30.0
WAVE-N, Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
WAVE-N is a high-performance, video-specialized NPU IP designed to deliver real-time, deep learning-based image enhancement for edge devices. By utili...
837
30.0
UCIe Die-to-Die Chiplet Controller
Introducing OPENEDGES’ Universal Chiplet Interconnect Express (UCIe) Controller IP, OUC, designed to transform the semiconductor landscape with innova...
838
30.0
Media Access Control Security (MACSec)
Media Access Control Security (MACSec) is an IEEE standards-based protocol for securing communication among the trusted components of an 802.1 LAN. MA...
839
30.0
Deeply Embedded AI Accelerator for Microcontrollers and End-Point IoT Devices
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s...
840
30.0
Performance Efficiency Leading AI Accelerator for Mobile and Edge Devices
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s...
841
30.0
Ceva-MotionEngine™
Ceva-MotionEngine is Ceva’s core sensor processing software system and is the product of over 20 years of experience developing sensor-based technolog...
842
30.0
High speed NoC (Network On-Chip) Interconnect IP
OPENEDGES is the only total memory system IP company providing both memory controller and on-chip interconnect. OIC is the ORBIT high-speed On-chip In...
843
30.0
High-efficiency vector DSP cores for 5G and 5G-Advanced
The Ceva-XC21 is the most efficient vector DSP core available today for communications applications. The Ceva-XC21 DSP is designed for low-power, cos...
844
30.0
High-Performance Edge AI Accelerator
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s...
845
30.0
Highly scalable inference NPU IP for next-gen AI applications
OPENEDGES, the total memory subsystem IP provider, introduces ENLIGHT Pro, a state-of-the-art inference neural processing unit (NPU) IP that outperfor...
846
30.0
eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPM-NS
Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...
847
30.0
Universal Chiplet Interconnect Express (UCIe) Controller
Integrating multiple chiplets within a single package has become crucial for high-performance computing. CoMira’s UCIe (Universal Chiplet Interconnect...
848
30.0
Low-power, high-speed 12-bit 4GSPS SAR (ADC) TSMC 28nm HPC+
The A12B4G is a low-power, high-speed analog to digital converter (ADC) intellectually property (IP) design block. It is a time interleaved (TI) succe...
849
30.0
Low-power, high-speed 12-bit, 8 GSPS Analog to Digital Converter (ADC) IP block TSMC 28nm HPC+ process
The A12B8G is a low-power, high-speed analog to digital converter (ADC) intellectually property (IP) design block. It is a time interleaved (TI) succe...
850
30.0
TSMC CLN7FF 7nm Deskew PLL - 400MHz-2000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...