Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3072 IP
551
4.0
12-bit, 250MSPS ADC on TSMC 7nm
The ODT-ADS-12B250M-7T is an ultra-low power ADC designed in a 7nm CMOS process. This 12-bit, 250MSPS ADC supports input signals up to 100MHz and f...
552
4.0
12b, 5Gsps, 0.9/1.8V Self Calibrating, Current steering DAC for 5G in TSMC 28nm
DA12B5000M28HPC is high performance 12b current steering DAC that supports data rate up-to 5Gsps. DAC core consists of a current source matrix with qu...
553
4.0
14b, 1.3Gsps, 40MHz BW ADC in TSMC 28nm
AD14B40M28HPC is a wide band continuous time sigma delta ADC with -80dBc of dynamic range in 40Mhz bandwidth. The ADC comprises of a continuous time s...
554
4.0
18-bit Sigma Delta Stereo Audio Analog-to-Digital Converter IP in TSMC 28nm
AD18SD28HPC is a complete low-cost stereo analog to digital converter for digital audio applications. The ADC comprises of a continuous time sigma del...
555
4.0
Nano power DC-DC converter with ultra-low quiescent current and high efficiency at light load in TSMC 40uLP
DCDC-ULP-LS-1.8-5.5-0.6-3.3.01_TSMC_40_ULP is a DC/DC buck converter in TSMC 40uLP supporting 1.8 to 5.5 V input voltage with low quiescent current an...
556
4.0
Ultra-Low-Power Bandgap Voltage Reference in TSMC 4nm CMOS
The ODT-REF-SV1P2-4T is a high-performance reference current and voltage generator. The block incorporates a proprietary architecture to achieve high ...
557
4.0
TSMC 40LP Crystal Oscillator, Ultrastable spec
The ShortLink Crystal Oscillator 'SL40LP_HPXO_1' is a complete mixed signal crystal oscillator driver designed for low power, quick start-up applicati...
558
3.0
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLP, Sesame 9T, a unique architecture based on 9-track cells, optimized for High Density and Low Dynamic Power allowing use...
559
3.0
9 track standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 uLPeF Sesame 9T a unique architecture based on 9-track cells, optimized for High Density and Low Dynamic Power allowing use...
560
3.0
6 track Ultra High Density standard cell library at TSMC 55 nm
Foundry Sponsored, TSMC 55 LeFP, SESAME uHD for ultra high-density logic design thanks to 6-track cells combined with pulsed latch cells acting as spi...
561
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
SESAME BiV 40 uLP a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the use of...
562
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
SESAME BiV 40 uLPeFlash a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the ...
563
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
TSMC 40 LPeF, SESAME BiV, a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through th...
564
3.0
12 track thick oxide standard cell library at TSMC 40 - low leakage and direct battery connection (operating voltages from 1.1 V to 3.3 V)
SESAME BiV 40 LP a new thick oxyde based standard cell library for ultra low leakage logic design and/or direct battery connection through the use of ...
565
3.0
24-bit Cap-less ADC 106 dB SNR low power and low latency 3 channels in TSMC 40ULP
sADC-uLP-ANC.03_TSMC_40_ULP is a mixed (analog and digital) Virtual Component in TSMC 40ULP containing three mono ADCs, and additional functions offer...
566
3.0
24-bit Cap-less ADC 106 dB SNR with ASRC 6 channels in TSMC 22ULL
hexADC-uLP-SW1.01_TSMC_22_uLL is a mixed (analog and digital) Virtual Component in TSMC 22ULL containing six mono ADCs, and additional functions offer...
567
3.0
24-bit Cap-less ADC 106 dB SNR with ASRC and phase alignement 6 channels in TSMC 22ULL
hexADC-uLP-SW1.02_TSMC_22_uLL is a mixed (analog and digital) Virtual Component in TSMC 22ULL containing six mono ADCs, and additional functions offe...
568
3.0
24-bit Cap-less ADC PLL-less 2 channels in TSMC 28HPCP
sADC-H1-LR.02_TSMC_28_HPCP is a mixed (analog and digital) Virtual Component in TSMC 28HPCP containing 2 mono ADCs, and additional functions offering ...
569
3.0
DC/DC Buck Regulator in TSMC 40LP
eSR-Niagara-Bu-dm-ref-1.62-3.63-0.8-2.5.01_TSMC_40_LP is a DC/DC converter in TSMC 40LP generating the SoC internal voltage supply from rails, lithium...
570
3.0
LDO linear regulator to supply logic and analog domains - up to 5.5 V input supply in TSMC 22ULL
iLR-Victoria-OV-ref-1.8-5.5-1.8-3.3.05_TSMC_22_ULL is a LDO linear regulator in TSMC 22ULL to supply logic and analog domains - up to 5.5 V input supp...
571
3.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 180eLL
RAR-eSR-iLR.04_TSMC_180_eLL is a Retention Alternating Regulator combination in TSMC 180eLL embedding two regulation sub-components: a switching regul...
572
3.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 40LPeF
RAR-eSR-qLR-ref-1.62-3.63-0.55-2.5.04_TSMC_40_LPeF is a Retention Alternating Regulator in TSMC 40LPeF combining two regulation sub-components: a high...
573
3.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 40uLP
RAR-eSR-qLR-ref-1.62-3.63-0.55-2.5.04_TSMC_40_uLP is a Retention Alternating Regulator in TSMC 40uLP combining two regulation sub-components: a high-e...
574
3.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 40uLPeF
RAR-eSR-qLR-ref-1.62-3.63-0.55-2.5.02_TSMC_40_uLPeFlash is a Retention Alternating Regulator in TSMC 40LP embedding two regulation sub-components: a s...
575
3.0
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode in TSMC 40uLPeF
RAR-eSR-qLR-ref-1.62-3.63-0.55-2.5.04_TSMC_40_uLPeF is a Retention Alternating Regulator in TSMC 40uLPeF combining two regulation sub-components: a hi...
576
3.0
UHS-II PHY for SD4/SD5 TSMC 12nm FF
SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...
577
3.0
UHS-II PHY for SD4/SD5 TSMC 16nm FF
SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...
578
3.0
Linear Regulator for analog island in TSMC 180eF
LRA-2.97-3.63-2.75_TSMC_180_eFLASH is a Low noise linear regulator LDO in TSMC 180eF operating from 2.97V to3.63V input voltage. The LRA output is 2.7...
579
3.0
Linear Regulator for digital island in TSMC 40uLPeF
iLR-Victoria-ref-1.62-3.63-0.8-2.5.02_TSMC_40_uLPeF is a Linear Regulator to supply digital islands in TSMC 40uLPeF....
580
3.0
Linear Regulator for digital island in TSMC 55uLPeF
iLR-Victoria-ref-1.62-3.63-0.8-2.5.02_TSMC_55_uLPeF is a Low-dropout LDO linear regulator in TSMC 55uLPeF to supply logic islands....
581
3.0
Linear regulator with ultra low quiescent current for retention applications in TSMC 40uLP
qLR-Aubrey-ref-1.62-3.63-0.55-2.5.03_TSMC_40_uLP is an ultra-low quiescent LDO (Linear regulator) in TSMC 40uLP....
582
3.0
Linear regulator with ultra low quiescent current for retention applications in TSMC 40uLPeF
qLR-Aubrey-ref-1.62-3.63-0.55-2.5.03_TSMC_40_uLPeF ultra-low quiescent LDO (Linear regulator) in TSMC 40uLPeF....
583
3.0
Linear Regulator, Fast load transient response voltage regulator optimized for sensitive application such as RF blocks in TSMC 40LP
iLR-Mystic-ref-2.97-3.63-0.8-2.5.01_TSMC_40_LP is a Power efficient LDO in TSMC 40LP....
584
3.0
Linear Regulator, low quiescent current in TSMC 160eF
LRA-2.97-3.63-1.8_TSMC_160_eFlash is a low noise linear regulator in TSMC 160eF operating from 2.97V to3.63V input voltage. The LRA output is 1.8V. It...
585
3.0
Linear Regulator, low quiescent current in TSMC 180eF
LRA-2.97-3.63-1.8_TSMC_180_eFlash is a Low noise linear regulator LDO in TSMC 180eF operating from 2.97V to3.63V input voltage. The LRA output is 1.8V...
586
3.0
Linear Regulator, Low-noise optimized for sensitive application such as RF or PLL blocks in TSMC 65LP
LRO-1.8-3.6-1.25_TSMC_65_LP is a Low noise linear regulator LDO in TSMC 65LP operating from 1.8V to 3.63V input voltage....
587
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
588
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
589
3.0
Single Lane and Quad Lane 10Gbps USB3.1 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS USB 3.1 GEN2 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
590
3.0
Single Lane and Quad Lane 16Gbps PCIe4.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN4.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
591
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
592
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
593
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
594
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
595
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
596
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
597
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
598
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 65G process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
599
3.0
Ultra low quiescent current LDO in TSMC 40uLPeF
qLR-Aubrey-OV-ref-2.7-5.5-0.55-3.3.05_TSMC_40_uLPeF is an ultra low quiescent current LDO (Linear regulator) in TSMC 40nm uLPeF....
600
3.0
Ultra-low power & low frequency XTAL 32 kHz in TSMC 40uLpeFlash - High temperature (Grade 1, Tj=150°)
qOSC-XTAL-LP-32k-co.05_TSMC_40_uLPeF is a 32 kHz crystal oscillator in TSMC 40uLPeF. It is an excellent choice for IoT SoC with stringent power consum...