Design & Reuse
5454 IP
2201
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in GF 28SLP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol a...
2202
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
2203
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
2204
3.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
2205
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in GF 28SLP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2206
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2207
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2208
3.0
Single Lane and Quad Lane 5Gbps USB3.1 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS USB 3.1 GEN1 PHY is high performance, low power, low latency Single & Quad-Lane PHY that supports USB protocol and its signalling ne...
2209
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY in Samsung 28LPP process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
2210
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in GF 28SLP process
TERMINUS-CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single &Quad-Lane PCI Express PHY that supports PCI Express protocol and...
2211
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
2212
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 65G process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
2213
3.0
MIPI 4.1 M-PHY HS Gear 4
MIPI M-PHY HS Gear 4 IP is compliant with the MIPI serial communication protocol for use in mobile systems where performance, power, and efficiency ar...
2214
3.0
Low Jitter 1.25GHz to 2.5GHz Quadrature Output PLL
Terminus Circuits offers High speed, low Jitter PLL with 1.25GHz to 2.5GHz output. The ring oscillator based PLL provides balanced quadrature output. ...
2215
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in GF 28SLP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
2216
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 55LP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
2217
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 65GP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
2218
3.0
Multi-Link Multi-Protocol SerDes 16Gbps in TSMC 28HPC
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
2219
1.0
Rising edge delay cell for control circuits, 10ns - TSMC 180nm
Rising edge delay cell for control circuits, 10ns - TSMC 180nm...
2220
1.0
Rising edge delay cell for control circuits, 20ns - TSMC 180nm
Rising edge delay cell for control circuits, 20ns - TSMC 180nm...
2221
1.0
Rising edge delay cell for control circuits, 40ns - TSMC 180nm
Rising edge delay cell for control circuits, 40ns - TSMC 180nm...
2222
0.0
10G Base T Ethernet PHY
Terminus Circuits presents a state-of-the-art Ethernet PHY IP, supporting 100 Mbps, 1 Gbps, and 10 Gbps data rates. Purpose-built for performance-driv...
2223
0.0
DAB Receiver Kit
The DAB Receiver Kit from Fraunhofer IIS is a fully validated DAB/DAB+/T-DMB solution for the automotive and consumer market. This innovative software...
2224
0.0
Terminus Circuits - Design services, interconnect solutions
Terminus Circuits offers High Speed Serial Link Interface IPs and provides interconnect solutions across many standards like USB.org, PCIe-SIG, IEEE, ...
2225
0.0
mioty - The Wireless IoT Technology
Wireless data transmission systems are being increasingly deployed in industrial and home automation applications. These robust systems are used to tr...
2226
0.0
OneSpin - Certified IC Integrity Solutions to Develop Functionally Correct, Safe, Secure, and Trusted Integrated Circuits
OneSpin provides the most advanced and robust verification platform to address today s critical IC integrity issues. Our experts are dedicated to solv...
2227
0.0
Sonnox Fraunhofer Pro-Codec Plug-in
The Sonnox Fraunhofer Pro-Codec Plug-In is designed for the real-time auditioning, encoding and decoding of audio signals using Fraunhofer codecs. We...
2228
0.0
JPEG XS - the new low complexity codec standard for professional video production
JPEG XS stands for extra speed and extra small. The new ISO mezzanine codec standard co-developed by the Fraunhofer Institute for Integrated Circuits ...
2229
0.0
MPEG-H Audio
Providing interactive, immersive sound for TV and VR applications Immersive and personalized audio Hear your home team™: The MPEG-H Audio system...
2230
0.0
Fraunhofer IIS - Bavarian Chip-Design-Center (BCDC)
More innovation through chip design The semiconductor and chip crisis has had a serious impact on industrial companies worldwide. A high level of dep...
2231
0.0
Fraunhofer IIS - Research and development services
Fraunhofer IIS provides worldwide development of microelectronic circuits, devices, software and systems up to complete industrial solutions. Fields o...
2232
0.0
Fraunhofer Symphoria for automotive
Fraunhofer Symphoria ® is a universal solution for rendering outstanding stereo and 3D surround sound in automotive environments. The intelligent ...
2233
0.0
DRM Receiver Kit
The DRM Receiver Kit from Fraunhofer IIS is a fully validated DRM solution for the automotive and consumer market. This innovative software radio appr...
2234
200.0
MACsec Engine, 1G to 100G Single-Port
The MACsec-IP-160 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...
2235
200.0
MACsec Engine, 1G to 25G, Full Duplex, Integrated
As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-165 is a high-performance, split ingress/egress in-line...
2236
200.0
MACsec Engine, 1G to 50G Single-Port, with TSN support
The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...
2237
200.0
MACsec Engine,10M-25G Single-Port, ISO 26262 Compliant with xMII Interface
The MACsec-IP-362 consists of the Rambus MACsec-IP-162 (a single-port line-rate MACsec engine with FIFO interface and optional preemption) and xMII in...
2238
200.0
MACsec Engine,10M-50G Single-Port with xMII Interface and TSN Support
The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem. It is ISO 26262 ASIL-B Ready certified and ...
2239
200.0
UALink IP Solution with PHY, Controller and Verification IP
The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...
2240
200.0
HBM4 Memory Controller
The Rambus HBM4 Controller Core is designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced dat...
2241
200.0
CC-6xx CryptoManager Core
The Rambus CryptoManager Core CC-6xx is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-6xx. The CC-6xx products are designed...
2242
200.0
CC-7xx CryptoManager Core
The automotive-grade Rambus CryptoManager Core CC-7xx family is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-7xx. The CC-7...
2243
200.0
ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine
The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...
2244
200.0
ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant
The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...
2245
200.0
PCIe 7.0 Controller
The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...
2246
200.0
GDDR7 Memory Controller
The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (...
2247
200.0
CH-6xx CryptoManager Hub
The Rambus CryptoManager Hub CH-6xx is the next generation of flexible and configurable cryptographic family of accelerator cores. CH-6xx designs targ...
2248
200.0
CH-7xx CryptoManager Hub
The automotive-grade CryptoManager Hub (CMH) from Rambus is the next-generation of flexible and configurable cryptographic family of accelerator cores...
2249
200.0
MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6
The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
2250
200.0
MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5
The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...